Multi-layer printed circuit bare board enabling higher...

Stock material or miscellaneous articles – Structurally defined web or sheet – Discontinuous or differential coating – impregnation or bond

Reexamination Certificate

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C174S250000, C174S261000, C174S262000, C428S901000

Reexamination Certificate

active

06492007

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a multi-layer printed circuit bare board, and more particularly to such a board which enables higher density wiring, and also a method of manufacturing the same.
2. Description of the Background Art
A further quest for higher wiring density is requested in printed circuit bare boards along with the trend of higher function and higher density interconnection of electronic equipment. Multi-layer printed circuit bare boards have been put to use in order to meet the request. Multi-layer printed circuit bare boards consist of insulating layers and conductive layers accumulated with one on the other with the terminals of electronic parts mounted on the surface of the substrate, such as the solder bumps of BGAs (ball grid arrays), connected to an intended layer through the conductive holes, or via holes, which penetrate between the layers. In order to make the wiring density higher with the multi-layer printed circuit bare boards, reducing the width of conductive wiring patterns, reducing the spacing between conductive wiring patterns, reducing the diameters of lands and via holes, and eliminating via holes, for example, would be effective.
However, with conventional multi-layer printed circuit bare boards, it is getting difficult to draw out signal lines from BGA terminals using via holes, because via holes leave less space for wiring. In order to overcome the problem, a built-up structure of multi-layer printed boards may be used which can have smaller via holes and fewer through holes than conventional multi-layer boards. Built-up multi-layer printed circuit bare boards are manufactured in a “build-up” method, with which a conductive layer is formed over another conductive layer subsequently, so that the more layers require the more process steps. For example, at least the following process steps would be needed to make built-up boards; 1) a surface treatment process to increase adhesion between resin and conductive material, 2) applying insulation material (resin) over a conductive layer, 3) cure of the resin, 4) lasering (hole-making), 5) removing resin smear, 6) electroless copper deposition, 7) electrical copper plating, 8) photo-imaging and copper-etching, and 9) cure of the resin.
Built-up multi-layer printed circuit bare boards confronted some difficulty with BGA packaging when a via hole is wanted under a solder bump foot since the via hole is not filled sufficiently so that some amount of solder is taken in the via hole leaving insufficient amount of solder for joint. This problem forced putting connection lands between the solder bump lands, which placed a limitation to higher wiring density of the printed bare boards.
Moreover, with the conventional multi-layer built-up printed circuit boards, when the surface, or first, layer is required to be connected to the fourth layer from the surface, the process includes 27 process steps, which are three times as many as the above-mentioned process steps 1)-9), which has increased the manufacturing cost of built-up multi-layer boards.
In addition, with the manufacturing process of a conventional built-up structure of multi-layer printed circuit bare boards as described above, The interconnection between the first and fourth layers requires the boards to be subject to a resin cure process up-to three times, which may generate excessive heat to cause warp in the resin, resulting in a dimensional inaccuracy.
SUMMARY OF THE INVENTION
It is an object of the present invention to give a solution to these problems, more specifically to provide a multi-layer printed circuit bare board, and a method of manufacturing the same, in which a connection is established between conductive layers with another conductive layer intervening in between with better dimensional accuracy and fewer process steps than those of conventional built-up multi-layer printed circuit bare boards.
In accordance with the present invention, a multi-layer printed circuit bare board, which has 2n circuit layers, where n is a natural number exceeding a unity, includes electrical connections established between the (2i−1)-th layer and the 2i-th layer, where i=1, 2 . . . , n, by holes which are created through insulation material layers in between and filled with copper plating. Electrical connections are also accomplished between the 4i-th layer and the (4i−3)-th layer by holes created through insulation material layers in between and filled with copper plating.
In accordance with the present invention, a muli-layer printed circuit bare board comprises: at least two insulative layers each having two generally flat, primary surfaces; circuit layers including electrically conductive material forming electric circuitry and carried on at least one of the primary surfaces of said insulative layers; and bonding layers of insulative material intervening between adjacent ones of said insulative layers and bonding said adjacent insulative layers with each other to accumulate said circuit layers with one above the other; at least one of said insulative layers having a first through hole open to the primary surfaces thereof and filled with electrically conductive material interconnecting the circuit layers carried thereon with each other.
In an aspect of the invention, said electrically conductive material may advantageously be of copper plating.
Further in an aspect of the invention, said first through hole may preferably have a diameter of 40 micro-meter or less.
Advantageously in accordance with the present invention, one of said insulative layers and one of said bonding layers which is bonded to said first insulative layer have a second through hole cut therethrough to extend to the primary surface of second one of said insulative layers which is bonded to said one bonding layer, said second through hole being filled with electrically conductive material interconnecting the circuit layers carried on said first and second insulative layers with each other.
In accordance with the present invention, a multi-layer printed circuit bare board comprises: 2n circuit layers having electrically conductive material forming electric circuitry, where n is a natural number exceeding a unity; n insulative layers having two primary surfaces on which (2i−1)-th and 2i-th ones of said circuit layers are carried, where i is a natural number not exceeding n; and n−1 bonding layers of insulative material intervening between adjacent ones of said n insulative layers and bonding said adjacent insulative layers with each other to accumulate said circuit layers with one above the other; the insulative layers between the (2i−1)-th and 2i-th circuit layers having a first through hole open to the primary surfaces thereof and filled with electrically conductive material interconnecting the (2i−1)-th and 2i-th circuit layers with each other.
Further in accordance with the present invention, a method of manufacturing a multi-layer printed circuit bare board comprises the steps of: preparing n sheets of insulatlve material, where n is a natural number exceeding a unity; making first holes through the sheets of insulative material for interconnecting (2i−1)-th and 2i-th circuit layers to be respectively carried on two primary surfaces of the sheets of insulative material, where i is a natural number not exceeding n; depositing electrically conductive material inside the first holes using an electrical plating process until the holes are filled with the conductive material; forming an electrically conductive pattern of the (2i−1)-th and 2i-th circuits on the sheet of insulative material; stacking the sheets of insulative material having the electrically conductive pattern formed one above the other and adhering adjacent ones of the sheets with each other by using bonding material; making second holes through (2i−1)-th and (2i+1)-th circuit layers; and depositing electrically conductive material inside the second holes using an electrical plating process.


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