Multi-layer multi-processor information conveyor with periodic t

Details Multi-layer multi-processor information conveyor with periodic t Multi-layer multi-processor information conveyor with periodic t

1994-03-03

2000-11-07

Donaghue, Larry D.

Electrical computers and digital processing systems: processing

Processing architecture

Array processor

712 11, G06H 1500

Patent

active

061450715

ABSTRACT:
In a multi-processor computing system, a multi-layer architecture is described in which each layer has a plurality of dual ported microprocessors, one port of which receives data for processing and the other port of which is utilized for unloading or passing data to a subsequent layer. If the processing cannot be completed prior to the time allotted for the next load cycle for a particular processor, the processing is interrupted, the state of the processor currently engaged in the processing is stored in the data and the state of the processor is transferred to a processor of a subsequent layer where processing resumes as if no interruption had occurred.

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