Multi-layer control interface for clock switching in a...

Miscellaneous active electrical nonlinear devices – circuits – and – Gating – Converging with plural inputs and single output

Reexamination Certificate

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C327S295000, C327S099000

Reexamination Certificate

active

06642770

ABSTRACT:

BACKGROUND
1. Field of the Invention
This invention relates generally to the field of data communications. More specifically, the invention relates to clocking schemes for use with data communications elements, such as SONET/SDH add-drop multiplexers, switches, and the like.
2. Description of the Related Art
Communication systems transmit and receive data between multiple communication devices connected to one or more networks. The networks may be either asynchronous or synchronous. A synchronous network is a network in which clocks are controlled to run, ideally, at identical rates, or at the same mean rate with a fixed relative phase displacement, within a specified limited range. Networks based on Synchronous Optical Network (SONET) and/or Synchronous Digital Hierarchy (SDH) standards are examples of synchronous networks.
Conversely, an asynchronous network is a network in which the clocks do not need to be synchronous. An Ethernet LAN is an example of an asynchronous network.
In both asynchronous and synchronous networks, multiple clocks are available for distribution and selection. Furthermore, failure of a clock or degradation of a clock signal in a communication device may cause communication errors or even catastrophic failures. Clock distribution and protection circuits provide for the selection and protection of clock signals.
SUMMARY
A clock system includes a provisioning layer corresponding to a plurality of input clocks, and a plurality of layers arranged according to a hierarchy. The first layer in the hierarchy is operable to arrange the input clocks into groups and for each group select a corresponding group output clock. The remaining layers in the hierarchy are operable to arrange the group output clocks from a next layer higher in the hierarchy into groups and for each group select a corresponding group output clock. The lowest layer in the hierarchy is operable to select one of the group output clocks from the next layer higher in the hierarchy as a selected clock.
A clock system also includes a plurality of input clocks, and a first layer operable to receive the input clocks, arrange the input clocks into first groups, and for each first group select a first group output clock from one of the input clocks in the first group. A second layer is operable to receive the first group output clocks from the first layer, arrange the first group output clocks into second groups, and for each second group select a second group output clock from one of the first group output clocks in the second group. A third layer is operable to receive the second group output clocks and select one of the second group output clocks as a selected clock.


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