Multi-layer circuits and methods of manufacture thereof

Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C174S265000

Reexamination Certificate

active

06538211

ABSTRACT:

BACKGROUND OF THE INVENTION
This disclosure relates to multi-layer circuits. In particular, it relates to methods of making multi-layer circuits using a resin covered conductive layer comprising liquid crystalline polymer.
Circuits typically comprise a conductive circuit layer bonded or laminated to a dielectric layer. The conductive circuit layer is generally a conductive metal such as copper, and the dielectric layer generally comprises a polymer resin such as epoxy or polybutadiene. Depending on the selection of dielectric layer and its thickness, circuits can be either stiff or flexible.
Multi-layer circuits generally comprise at least one conductive circuit layer bonded to either another circuit or to a resin covered conductive layer, often referred to as a “cap layer”. More complex configurations are also possible, having two or more circuits and one or more resin covered conductive layers. While suitable for their intended purposes, the requirements for multi-layer circuits and high density, high performance applications are becoming ever more demanding with respect to density and environmental and electrical performance. Accordingly, there remains a need in the art for a multi-layer circuit comprising a resin covered conductive layer that can meet these needs.
SUMMARY OF THE INVENTION
An improved multi-layer circuit comprises a circuit and a resin covered conductive layer disposed on the circuit, wherein the resin comprises a liquid crystalline polymer resin laminated to the conductive layer. Use of such resin covered conductive layers results in multi-layer circuits having a combination of mechanical, electrical, and thermal properties better than those currently available.
The above discussed and other features and advantages of the present invention will be appreciated and understood by those skilled in the art from the following detailed description and drawings.


REFERENCES:
patent: 3625844 (1971-12-01), McKean
patent: 3677828 (1972-07-01), Caule
patent: 3716427 (1973-02-01), Caule
patent: 3764400 (1973-10-01), Caule
patent: 3853716 (1974-12-01), Yates et al.
patent: 4387006 (1983-06-01), Kajiwara et al.
patent: 4490218 (1984-12-01), Kadija et al.
patent: 4549950 (1985-10-01), Polan et al.
patent: 4568431 (1986-02-01), Polan et al.
patent: 4647315 (1987-03-01), Parthasarathi et al.
patent: 4692221 (1987-09-01), Parthasarathi
patent: 4737398 (1988-04-01), Ikenaga et al.
patent: 4863767 (1989-09-01), Garg et al.
patent: 4876120 (1989-10-01), Belke et al.
patent: 4942095 (1990-07-01), Buchert et al.
patent: 4963428 (1990-10-01), Harvey et al.
patent: 4966806 (1990-10-01), Lusignea et al.
patent: 4966807 (1990-10-01), Harvey et al.
patent: 4975312 (1990-12-01), Lusignea et al.
patent: 5164458 (1992-11-01), Jennings et al.
patent: 5200026 (1993-04-01), Okabe
patent: 5250363 (1993-10-01), Chen
patent: 5259110 (1993-11-01), Bross et al.
patent: 5288529 (1994-02-01), Harvey et al.
patent: 5360672 (1994-11-01), Saito et al.
patent: 5454926 (1995-10-01), Clouser et al.
patent: 5529740 (1996-06-01), Jester et al.
patent: 5544773 (1996-08-01), Haruta et al.
patent: 5571608 (1996-11-01), Swamy
patent: 5614324 (1997-03-01), Poutasse et al.
patent: 5703202 (1997-12-01), Jester et al.
patent: 5703302 (1997-12-01), Jester et al.
patent: 5719354 (1998-02-01), Jester et al.
patent: 5785789 (1998-07-01), Gagnon et al.
patent: 5863405 (1999-01-01), Miyashita
patent: 5863410 (1999-01-01), Yates et al.
patent: 5863666 (1999-01-01), Merchant et al.
patent: 5900292 (1999-05-01), Moriya
patent: 5908544 (1999-06-01), Lee et al.
patent: 5997765 (1999-12-01), Furuta et al.
patent: 6027771 (2000-02-01), Moriya
patent: 6093499 (2000-07-01), Tomioka
patent: 6228465 (2001-05-01), Takiguchi et al.
patent: 6274242 (2001-08-01), Onodera et al.
patent: 6296949 (2001-10-01), Bergstresser et al.
patent: 6403211 (2002-06-01), Yang et al.
patent: 2001/0005545 (2001-06-01), Andou et al.
patent: 2002/0028293 (2002-03-01), Yang et al.
patent: 2002/0037397 (2002-03-01), Suzuki et al.
patent: 2273542 (1998-06-01), None
patent: 2273542 (1999-12-01), None
patent: 0 507 332 (1992-04-01), None
patent: 0484818 (1992-05-01), None
patent: 0507332 (1992-10-01), None
patent: 0697278 (1996-02-01), None
patent: 0 949 067 (1999-04-01), None
patent: 0949067 (1999-10-01), None
patent: 1 044 800 (2000-03-01), None
patent: 1044800 (2000-10-01), None
patent: 01319640 (1989-12-01), None
patent: 4367763 (1992-12-01), None
patent: 06097614 (1994-04-01), None
patent: 065097614 (1994-04-01), None
patent: Hei 7-3033 (1995-01-01), None
patent: 10324936 (1998-12-01), None
patent: 00280341 (2000-10-01), None
patent: P2000-280341 (2000-10-01), None
patent: P2001-244630 (2001-07-01), None
patent: WO 97/19127 (1997-05-01), None

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Multi-layer circuits and methods of manufacture thereof does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multi-layer circuits and methods of manufacture thereof, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multi-layer circuits and methods of manufacture thereof will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3022402

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.