Metal working – Method of mechanical manufacture – Electrical device making
Patent
1985-06-24
1987-07-28
Goldberg, Howard N.
Metal working
Method of mechanical manufacture
Electrical device making
29831, 29832, 361401, 361414, H05K 332
Patent
active
046824146
ABSTRACT:
Multi-layer circuitry incorporating electronic elements is disclosed. The circuitry comprises a plurality of layers including a metal or alloy substrate formed with a recess on one surface. An electronic element is positioned within the recess and a second electronic element is positioned on the surface. Also, a first dielectric material layer is disposed on the surface. Further, a first layered conductive circuit pattern overlies the first dielectric material layer so as to provide circuitry over a substantial portion of the substrate. The first circuit pattern is electrically connected to the first electronic element. The first circuit pattern also has a cavity therein for receiving the second electronic element. A second layered conductive pattern overlies at least a portion of the first layered conductive circuit pattern and the second electronic element and is electrically connected to the second electronic element. A second dielectric material layer is disposed between the first and second layered conductive circuit patterns so that these circuit patterns are bonded to and isolated from each other.
REFERENCES:
patent: 3250848 (1966-05-01), Beelitz et al.
patent: 3296099 (1967-01-01), Dinella
patent: 3316458 (1967-04-01), Jenny
patent: 3341369 (1967-09-01), Caule et al.
patent: 3351816 (1967-09-01), Sear et al.
patent: 3390308 (1968-06-01), Marley
patent: 3480836 (1969-11-01), Aronstein
patent: 3546363 (1970-12-01), Pryor et al.
patent: 3549784 (1970-12-01), Hargis
patent: 3618203 (1971-11-01), Pryor
patent: 3676292 (1972-07-01), Pryor et al.
patent: 3698964 (1972-10-01), Caule et al.
patent: 3726987 (1973-04-01), Pryor et al.
patent: 3730779 (1973-05-01), Caule et al.
patent: 3739232 (1973-06-01), Grossman et al.
patent: 3760090 (1973-09-01), Fowler
patent: 3792383 (1974-02-01), Knappenberger
patent: 3810754 (1974-05-01), Ford et al.
patent: 3826627 (1974-07-01), Pryor et al.
patent: 3826629 (1974-07-01), Pryor et al.
patent: 3837895 (1974-09-01), Pryor et al.
patent: 3852148 (1974-12-01), Pryor et al.
patent: 3875478 (1975-04-01), Capstick
patent: 4109054 (1978-08-01), Burgyan
patent: 4149910 (1979-04-01), Popplewell
patent: 4225900 (1980-09-01), Ciccio et al.
patent: 4283755 (1981-08-01), Tracy
patent: 4320438 (1982-06-01), Ibrahim et al.
patent: 4371744 (1983-02-01), Badet et al.
patent: 4372804 (1983-02-01), Hanabusa et al.
patent: 4381602 (1983-05-01), McIver
patent: 4385202 (1983-05-01), Spinelli et al.
patent: 4420364 (1983-12-01), Nukii et al.
patent: 4491622 (1985-01-01), Butt
patent: 4544989 (1985-10-01), Nakabu et al.
IBM Technical Disclosure Bulletin, vol. 22, no. 10, Mar. 1980, pp. 4469-4470, New York, US; V. D. Coombs et al.: "High Performance Package With Conductive Bonding To Chips".
"Ceramic Glossary, 1984" by Walter W. Perkins, published by The American Ceramic Society, Inc.
Cohn Howard M.
Goldberg Howard N.
Gorski J.
Olin Corporation
Weinstein Paul
LandOfFree
Multi-layer circuitry does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Multi-layer circuitry, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multi-layer circuitry will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2028481