Multi-input/output repair method of NAND flash memory device...

Details Multi-input/output repair method of NAND flash memory device... Multi-input/output repair method of NAND flash memory device...

2006-04-11

2006-04-11

Nguyen, Tan T. (Department: 2827)

Static information storage and retrieval

Floating gate

Particular connection

C365S185110, C365S200000

Reexamination Certificate

active

07027330

ABSTRACT:
A multi-I/O repair method of a NAND flash memory device and a NAND flash memory device thereof are disclosed. A NAND flash memory device is disclosed in which page buffers are positioned at the top and bottom of a main array and a redundancy array and have different data lines. The top/bottom page buffers of the redundancy array are all selected according to an external address and data is transmitted over redundancy data lines, and this data is finally selected through a data line select unit. Accordingly, if main columns having different addresses are to be repaired, they can be replaced with redundancy columns one to one and multi-I/O repair of two main columns having the same address is thus possible.

REFERENCES:
patent: 6813184 (2004-11-01), Lee
patent: 6967868 (2005-11-01), Kim et al.
patent: 2005/0254320 (2005-11-01), Kim

Affiliated with

Also associated with

Rating

Multi-input/output repair method of NAND flash memory device... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multi-input/output repair method of NAND flash memory device..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multi-input/output repair method of NAND flash memory device... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3609756