Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – Having selection between plural continuous waveforms
Reexamination Certificate
1997-12-12
2001-08-07
Cunningham, Terry D. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific signal discriminating without subsequent control
Having selection between plural continuous waveforms
C327S064000, C327S058000, C707S793000
Reexamination Certificate
active
06271693
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates in general to magnitude sorting among a number of signals. In particular, this invention relates to magnitude sorting of a number of signals in an ascending or descending ordered manner governed by the clock controlling signals.
2. Description of Related Art
Ordering of magnitudes for large and small among a number of electrical signals having different measured magnitudes is necessary among many digital applications. One method of magnitude sorting relies on software schemes that are conducted on number processing devices such as digital computers. This is not suitable for real-time processing of signals as the computer program embodying the software scheme cannot obtain its sorted result until after the conclusion of the program processing. A time-lagged result of such software-based sorting schemes has also placed limitations to possible areas of application of this category of magnitude sorting.
On the other hand, however, current hardware sorter circuitry can only differentiate either the largest or the smallest, or both, of the compared signals among the signals. To sort the signals in an orderly ascending or descending sequence, these conventional sorters must perform a number of subsequent sorting sessions to subsequently pick out the largest, or smallest, signal in a processed pool of the signals. Within these subsequent sessions the identified largest or smallest signal is removed from the next processed pool. This hardware sorting scheme has a circuitry scale that is substantially proportional to the number of processed signals. In other words, the larger the total number of sorted signals, the larger the scale of the sorter circuitry. Meanwhile, the more the sorted signals, the longer the delay time before the final sorted result can be obtained. This is obvious since the more the sorted signals, the more the maximum- or the minimum-magnitude signal-identifying sessions will be required. Thus, such hardware sorters, are by no means suitable for real-time applications as well.
SUMMARY OF THE INVENTION
It is therefore an object of the invention to provide a magnitude sorter that is capable of generating sorted outputs that are arranged in the ascending or descending ordered manner for a number of input signals based on the magnitudes thereof.
It is another object of the invention to provide a magnitude sorter for generating sorted outputs for a number of input signals that can process fast enough for real-time applications.
It is yet another object of the invention to provide a magnitude sorter for generating sorted outputs of a number of input signals that has a circuit structure suitable for implementation as integrated circuit devices.
The present invention achieves the above-identified objects by providing a magnitude sorter circuit apparatus for sorting to output a number of input signals into an ascending or descending ordered manner based on the magnitude of the input signals. The sorter apparatus has a signal input section that includes a number of signal input unit circuits, each, of the signal input unit circuits has an input for receiving a corresponding one of the input signals and generating an output signal, and further has a feedback input for receiving a feedback signal; and each of the signal input unit circuits is driven by a first clock control signal. A maximum-deriving section includes a number of maximizing unit circuits, each of the maximizing unit circuits receives the output signal output by the corresponding signal input unit circuit, and generates an output signal that is connected together with those generated by other maximizing unit circuits to form the maximized output of the maximum-deriving section. A feedback control and voltage output section includes a number of feedback control/voltage output unit circuits, each of the feedback control/voltage output unit circuits receives the output signal output by the corresponding signal input unit circuit, and generates a feedback control signal for feedback into the feedback input of the corresponding signal input unit circuit, and each of the feedback control/voltage output unit circuits is driven by a second clock control signal, and each has a first and second input voltage signals. A sorted output sections has an input for receiving the maximized output of the maximum-deriving section and a number of timing clock inputs each receiving a corresponding one of the timing clock control signals, and has a number of sorted outputs, the sorted output section generates the sorted output signals at the sorted outputs in the sorted ascending or descending ordered manner controlled by the timing clock control signals.
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Lin Gu
Shi Bingxue
Cunningham Terry D.
Nguyen Long
Rabin & Champagne, P.C.
United Microelectronics Corp.
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