Multi-element operand sub-portion shuffle instruction execution

Details Multi-element operand sub-portion shuffle instruction execution Multi-element operand sub-portion shuffle instruction execution

2006-12-26

2006-12-26

Kim, Kenneth S. (Department: 2111)

Electrical computers and digital processing systems: processing

Byte-word rearranging, bit-field insertion or extraction,...

C712S022000

Reexamination Certificate

active

07155601

ABSTRACT:
An apparatus and method for performing a shuffle operation on packed data is described. In one embodiment, a 128-bit packed data operand having at eight data elements is accessed. In one embodiment, one of the data elements in the upper half of the data operand is shuffled into the upper half of a destination register. In another embodiment, one of the data elements in the lower half of the data operand is shuffled into the lower half of a destination register.

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