Multi-die semiconductor package structure and method for...

Details Multi-die semiconductor package structure and method for... Multi-die semiconductor package structure and method for...

2011-01-25

2011-01-25

Andújar, Leonardo (Department: 2826)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Metallic housing or support

C257S666000, C257S686000

Reexamination Certificate

active

07875505

ABSTRACT:
The present invention provides a multi-die semiconductor package structure and a manufacturing method thereof, which includes providing at least two dies and a lead frame including a die pad and a lead wire located at the periphery of the die pad, the die pad has a via hole at the edge thereof, binding a base opposite side of a first die to the die pad; electrically connecting the first die to the lead wire through the via hole; binding a base side of a second die to the die pad, the first and second dies are disposed on the opposite sides of the die pad respectively; electrically connecting the second die to the lead wire; stacking other dies above the first or second die and electrically connecting them to the lead wire; and encapsulating said at least two dies and the lead frame to form a package.

REFERENCES:
patent: 6271581 (2001-08-01), Huang et al.
patent: 6316727 (2001-11-01), Liu

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