Multi-die semiconductor package

Details Multi-die semiconductor package Multi-die semiconductor package

2005-04-12

2005-04-12

Flynn, Nathan J. (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

With structure for mounting semiconductor chip to lead frame

C257S666000, C257S686000, C257S687000, C257S692000, C257S697000, C257S784000

Reexamination Certificate

active

06879028

ABSTRACT:
A multi-die semiconductor package having an electrical interconnect frame. A top integrated circuit die is attached to the top side of an upper contact level of the frame and a bottom integrated circuit die is attached to the bottom side of the upper contact level of the frame. The die bond pads of the top die are electrically coupled (e.g. wired bonded) to pads of a lower contact level of the interconnect frame. The die bond pads of the bottom integrated circuit die are electrically coupled (e.g. wired bonded) to bond pads of the upper contact level of the frame. The bond pads of the lower contact level serve as external bond pads for the package. The frame may include inset structures, each having an upper portion located in the upper contact level and a lower portion located in the lower contact level.

REFERENCES:
patent: 5147815 (1992-09-01), Casto
patent: 5222014 (1993-06-01), Lin
patent: 5473514 (1995-12-01), Nagano
patent: 5495398 (1996-02-01), Takiar et al.
patent: 5545922 (1996-08-01), Golwalkar et al.
patent: 5637913 (1997-06-01), Kajihara et al.
patent: 5640044 (1997-06-01), Takehashi et al.
patent: 5646829 (1997-07-01), Sota
patent: 5864470 (1999-01-01), Shim et al.
patent: 6104084 (2000-08-01), Ishio et al.
patent: 6225688 (2001-05-01), Kim et al.
patent: 6329224 (2001-12-01), Nguyen et al.
patent: 6340839 (2002-01-01), Hirasawa et al.
patent: 6376914 (2002-04-01), Kovats et al.
patent: 6603072 (2003-08-01), Foster et al.
patent: 6713852 (2004-03-01), Abbott et al.
patent: 6737736 (2004-05-01), Abe et al.
patent: 6781243 (2004-08-01), Li et al.
patent: 20010013643 (2001-08-01), Nakanishi et al.
patent: 0 680 086 (2001-09-01), None
patent: 01220837 (1989-09-01), None
patent: 01272144 (1989-10-01), None

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