Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular chip input/output means
Reexamination Certificate
2002-07-16
2004-09-28
Wilson, Allan R. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Gate arrays
With particular chip input/output means
C257S778000, C257S784000
Reexamination Certificate
active
06797998
ABSTRACT:
FIELD OF THE INVENTION
The field of the present invention pertains to electronic integrated circuits. More particularly, the present invention relates to printed circuit board interfaces.
BACKGROUND OF THE INVENTION
Digital computer systems are being used today to perform a wide variety of tasks. Many different areas of business, industry, government, education, entertainment, and most recently, the home, are tapping into the enormous and rapidly growing list of applications developed for today's increasingly powerful computer devices.
Modern computer systems usually feature powerful digital processor integrated circuit devices. The processors are used to execute software instructions to implement complex functions, such as, for example, 3-D graphics applications, voice recognition, data visualization, and the like. The performance of many these applications is directly benefited by more powerful, more capable processors. With each new generation of processor, increasingly powerful computer systems are capable of more functions while decreasing in cost.
Computer system manufacturers often employ multiple configurations of processors, memory, and motherboards. The different configurations are used to satisfy the different requirements of varying market segments. For example, more powerful systems can include two or more processors and have provisions for a large amount of installed RAM. Similarly, more specialized computer systems can include specialized provisions for special function integrated circuit components, such as graphics accelerators, media processor chips, high-speed input output chips, and the like.
The central processing units (CPU) and the graphics processing units (GPU) of computer systems are fundamental to the power and capability of the overall computer system. As such, the design and the features of CPU and GPU integrated circuits evolved rapidly, as device manufacturers a spend large amounts of research and development effort improving their capabilities.
As computer systems increase in power, manufacturers also strive to reduce their overall cost. One method to control costs is to reduced the number of different types of supporting parts needed for each different type of CPU or GPU. For example, modern computer system chipsets are designed to support multiple models of a given processor generation or product line. In the past, a large number of chips (e.g., a dozen or more) populated a motherboard to support the CPU. More recently, many of the functions previously performed by separate chips are integrated into two or three chip components, thereby reducing manufacturing costs. Another example involves the preferred use of industry standard interfaces. For example, as the features and capabilities of CPUs evolve over time, the signals used to interface with external chipsets change.
New chip sets and interfaces must be designed to support the changed processors. This is a costly process (debugging, testing, etc.). Accordingly, major updates to the interfaces of a processor are generally limited to once every two to three years at least. For example, a socket interface of a processor line is usually not updated more often than once every two to three years, even though, the internal architecture of the processor line may be updated several times within this time frame. Thus, there is pressure to limit changes to a processor's interface as successive models are introduced.
The pressure to limit changes to a processor's interface results in a number of problems. One such problem involves the fact that limiting changes in the processor interface can limit the evolution and improvement of processor models. New technology requiring a new interfaces are held back until it becomes cost effective to implement the new interface. For example, even though significant advances are made in a processor's internal architecture, clock speeds may increase significantly, or the like, changes to the processor's external socket interface are implemented only once every two to three years. Additionally, it is not cost effective to introduce different versions of a processor, since different versions, which may offer substantially customized features, may require new interfaces. New interfaces are costly to implement. Additionally, new interfaces have the undesirable effect of making previous interfaces obsolete (e.g., “Slot 1”, “Socket 7”, “Socket 8”, etc. from Intel™ and the other CPU manufactures).
Thus what is required is an interface that can accommodate changes in the I/O architecture (electrical signal pins) of a processor. The present invention provides a novel solution to the above requirement.
SUMMARY OF THE INVENTION
Embodiments of the present invention provide a multi-configuration GPU interface having a standardized interface for coupling to a printed circuit board. Embodiments of the present invention provide an interface that can accommodate changes in the I/O architecture (electrical signal pins) of a GPU while maintaining a standardized interface for coupling to a printed circuit board. Additionally, embodiments of the present invention can accommodate different GPU versions supporting different feature sets while maintaining a standardized printed circuit board interface.
In one embodiment, the present invention is implemented as a multi-configuration interface device for coupling different types of GPUs to a PCB (printed circuit board). The interface device comprises a GPU interface for a connection to the GPU and a PCB interface-for a connection to the PCB. The GPU interface is implemented using a customizable attachment footprint for effectuating a connection to differing GPU types while maintaining the PCB interface for the connection to the PCB. The customizable attachment footprint is configurable (e.g., as the interface device is manufactured) to support one of a number of different types of GPUs. The interface device maintains a consistent PCB interface across different customized attachment footprints. Thus, as GPU characteristics change and evolve, or as different GPU versions are implemented, a consistent connection can be maintained for the PCB.
Depending upon the requirements of a given GPU, embodiments of the interface device can be configured to support different types of attachment to the GPU, such as, for example, a wire bond attachment, a substrate attachment (wherein the substrate has a flip chip mounted GPU), and the like. Similarly, embodiments of the interface device include first and second areas of the customizable attachment footprint, wherein the second area is disposed around the periphery of the first area, and wherein the first area comprises a plurality of thermal balls or contact pads to support a wire bond attachment to a GPU.
In one embodiment, the GPU interface and the PCB the interface are configured to support an AGP 4× or AGP 8× interface. Similarly, the PCB interface can be configured to support dual DACs for dual displays and/or digital video output for digital displays.
In this manner, embodiments of the present invention implement a GPU interface device that provides a standardized interface for coupling to a printed circuit board and accommodates changes in the I/O architecture or feature set of a GPU while maintaining the standardized interface. Additionally, the interface device embodiments utilize customizable attachment footprints implemented with compact and inexpensive ball grid arrays to implement the GPU connection as opposed to prior art socket and slot interconnections.
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Dewey Thomas E.
Dobbins James K.
Minacapelli Joseph S.
Thomas Simon A.
nVidia Corporation
Wagner , Murabito & Hao LLP
Wilson Allan R.
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