Multi-clock matched filter for receiving signals with multipath

Details Multi-clock matched filter for receiving signals with multipath Multi-clock matched filter for receiving signals with multipath

2000-03-16

2003-10-07

Vo, Don N. (Department: 2631)

Pulse or digital communications

Spread spectrum

Direct sequence

C375S149000, C375S152000, C370S335000, C370S342000, C370S441000

Reexamination Certificate

active

06631157

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates to communications, and more particularly to receiving signals in a multipath environment.
DESCRIPTION OF THE RELATED ART
Communications, using radiowaves, may encounter reflections from more than one object or from multiple surfaces. The length of each path for the radio waves can be different, which gives rise to radio waves from the different paths arriving at different times. Radiowaves for one signal arriving at different times at a receiver is well known as multipath. Each path of the radio waves in a multipath environment is a ray.
A typical approach to receiving a signal with multipath is RAKE. A RAKE system usually locks onto a strongest ray from the multipath, and simultaneously searches for a next strongest ray to replace the ray which is initially acquired. While a RAKE system may include a matched filter, the RAKE system typically has one clock and does not combine the various multipath signals.
SUMMARY OF THE INVENTION
A general object of the invention is to combine multiple rays arriving at a receiver due to multipath.
Another object of the invention is to employ a matched filter, having a clock system for receiving multiple rays.
An additional object of the invention is to maximally ratio combine multiple rays from multipath.
According to the present invention, as embodied and broadly described herein, an improvement to a spread-spectrum receiver is provided for receiving, from a multipath environment, a spread-spectrum signal. The spread-spectrum signal has data spread by a chip-sequence signal. Each chip of the chip-sequence signal has a chip duration. The spread-spectrum signal arrives from a plurality of paths in the multipath environment.
The improvement includes a clock-signal generator, an analog-to-digital converter, a plurality of signal registers, a plurality of gates, a signal-register multiplexer, a matched filter, a RAKE-timing generator, a plurality of delay-locked-loop (DLL) path-tracking circuits, and a plurality of DLL multiplexers. The clock-signal generator generates a clock signal. The clock signal has a plurality of phases during the chip duration.
The analog-to-digital converter samples the spread-spectrum signal to generate a plurality of chip samples. The analog-to-digital converter converts each chip sample to a digital-chip sample. The plurality of signal registers store a plurality of digital-chip samples. A particular gate, of the plurality of gates, passes a respective number of the plurality of digital-chip samples into a respective signal register, of the plurality of signal registers, in response to a particular set of phase signals. The signal-register multiplexer selects a respective signal register from the plurality of signal registers.
The matched filter has an impulse response matched to the spread-spectrum signal. The matched filter detects an early portion, a punctual portion, and a late portion of each chip embedded in the spread-spectrum signal, for each detected path of the plurality of paths. In response to a respective path-select signal of the plurality of path-select signals, the plurality of DLL path-tracking circuits gate the early portion and the late portion, corresponding to a respective path, of each detected spread-spectrum signal, into the DLL path-tracking circuit. The DLL path-tracking circuit generates a DLL signal of a plurality of DLL signals. The RAKE-timing generator generates a plurality of path-select signals. The path-select signals correspond to the plurality of paths from the multipath environment. In response to a respective DLL signal from a respective DLL path-tracking circuit, each of the plurality of DLL multiplexers passes a respective set of phases of the plurality of phases from the clock-signal generator to a respective gate of the plurality of gates.
Additional objects and advantages of the invention are set forth in part in the description which follows, and in part are obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention also may be realized and attained by means of the instrumentalities and combinations particularly pointed out in the appended claims.


REFERENCES:
patent: 5528624 (1996-06-01), Kaku et al.
patent: 5548613 (1996-08-01), Kaku et al.
patent: 5802102 (1998-09-01), Davidovici
patent: 5809062 (1998-09-01), Hulbert
patent: 6041073 (2000-03-01), Davidovici et al.

Affiliated with

Also associated with

Rating

Multi-clock matched filter for receiving signals with multipath does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multi-clock matched filter for receiving signals with multipath, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multi-clock matched filter for receiving signals with multipath will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3118887