Multi-clock domain data input-processing device having...

Details Multi-clock domain data input-processing device having... Multi-clock domain data input-processing device having...

2006-05-02

2006-05-02

Mai, Son (Department: 2827)

Static information storage and retrieval

Addressing

Sync/clocking

C365S189050, C365S194000

Reexamination Certificate

active

07038971

ABSTRACT:
A multi-clock-domain data input processing device preferably includes: a clock-signal-receiving synchronous circuit that generates an output clocking signal by phase-delaying a first clock signal; a data input part having a delay locked loop (DLL); and an input-processing part. The data input part preferably inputs data in response to the first clock signal and the input-processing part transfers data in response to a second clock signal having a timing different from that of the first clock signal. A clock-signal applying method for operating the multi-clock-domain data input-processing device preferably includes the steps of: applying a plurality of clock signals to a signal-receiving clock conversion part; and applying a delayed clocking signal outputted from the DLL to the remaining parts of the data input-processing device.

REFERENCES:
patent: 5896347 (1999-04-01), Tomita et al.
patent: 5978281 (1999-11-01), Anand et al.
patent: 6064625 (2000-05-01), Tomita
patent: 6178138 (2001-01-01), Derbenwick et al.
patent: 6229757 (2001-05-01), Nagata et al.
patent: 6324119 (2001-11-01), Kim
patent: 6407963 (2002-06-01), Sonoda et al.
patent: 6498766 (2002-12-01), Lee et al.
patent: 6639868 (2003-10-01), Kim et al.
patent: 6707726 (2004-03-01), Nishio et al.
patent: 6728162 (2004-04-01), Lee et al.
patent: 6775190 (2004-08-01), Setogawa
*Title: “A Skew and Jitter Suppressed DLL Architecture for high frequency DDR SDRAMs”.

Affiliated with

Also associated with

Rating

Multi-clock domain data input-processing device having... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multi-clock domain data input-processing device having..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multi-clock domain data input-processing device having... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3644725