Multi-chips package

Details Multi-chips package Multi-chips package

2005-04-12

2005-04-12

Quach, T. N. (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

C257S706000, C257S777000, C257S778000

Reexamination Certificate

active

06879031

ABSTRACT:
A multi-chips package at least comprises a substrate, an upper chip, a lower chip, a reinforced device, and a plurality of electrically conductive bumps. The upper chip is flip-chip bonded to the upper surface of the substrate and the lower chip is accommodated in the opening and flip-chip bonded to the upper chip. Furthermore, the reinforced device is mounted onto the back surface of the lower chip and the lower surface of the substrate. The coefficient of the thermal expansion of the reinforced device ranges from the coefficient of the thermal expansion of the substrate to the coefficient of the thermal expansion of the chip. In such a manner, the reinforced device can constrain the thermal deformation of the substrate so as to prevent the electrically conductive bumps connecting the first chip and the substrate from being damaged.

REFERENCES:
patent: 6479903 (2002-11-01), Briar
patent: 6503776 (2003-01-01), Pai et al.
patent: 6693362 (2004-02-01), Seyama et al.
patent: 6693364 (2004-02-01), Tao et al.
patent: 6713856 (2004-03-01), Tsai et al.
patent: 20040012094 (2004-01-01), Harper et al.
patent: 20040164390 (2004-08-01), Wang
patent: 20040183556 (2004-09-01), Wada et al.

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