Multi-chip stacked devices

Details Multi-chip stacked devices Multi-chip stacked devices

1993-04-06

1994-03-01

James, Andrew J.

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

257686, 257782, 257783, 257676, H01L 2348, H01L 2940, H01L 2302, H01L 2332

Patent

active

052910610

ABSTRACT:
A multiple stacked die device is disclosed that contains up to four dies and does not exceed the height of current single die packages. Close-tolerance stacking is made possible by a low-loop-profile wire-bonding operation and thin-adhesive layer between the stacked dies.

REFERENCES:
patent: 4567643 (1986-02-01), Droguet et al.
patent: 4984059 (1991-01-01), Kubota et al.
patent: 4996587 (1991-02-01), Hinrichsmeyer et al.
patent: 5012323 (1991-04-01), Farnworth
patent: 5049976 (1991-09-01), Demmin et al.

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