Multi-chip semiconductor package

Details Multi-chip semiconductor package Multi-chip semiconductor package

1991-04-26

1994-07-26

Jackson, Jerome

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

For plural devices

257692, 257725, H01L 2316, H01L 2348

Patent

active

053329228

ABSTRACT:
A pair of DRAM chips 1A and 1B are mounted opposedly to each other with wiring means such as lead frames put therebetween, the lead frames being substantially integral with external terminals 3B. Then, these DRAM chips and lead frames are connected together by the conventional wire bonding method. Each chip is bonded with an associated lead frame and each lead frame is disposed as plural lead frame conductors contacting mutually lead frame conductors associated with similarly function bonding pads, i.e. external terminals of the chips, of the other one of the pair of chips. Ones or plural pairs of the thus-connected DRAM chips and lead frames are stacked and corresponding leads of the lead frames are connected in common to form a laminate. The plural DRAM chips thus mounted are activated selectively in accordance with a predetermined chip selection signal. Additionally, partial DRAM chips capable of partially functioning normally are combined together by utilizing the above chip mounting method to constitute a single DRAM package.

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