Multi-chip package system incorporating an internal stacking...

Details Multi-chip package system incorporating an internal stacking... Multi-chip package system incorporating an internal stacking...

2008-10-09

2010-06-08

Picardat, Kevin M (Department: 2822)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Assembly of plural semiconductive substrates each possessing...

C438S124000, C438S127000, C257S685000, C257S723000

Reexamination Certificate

active

07732252

ABSTRACT:
The present invention provides a multi-chip package system that includes: providing a package substrate; attaching a base semiconductor die to the package substrate; connecting an interconnect between the base semiconductor die and the package substrate; and encapsulating at least portions of the package substrate, the base semiconductor die, and the interconnect with an encapsulant defining a support protrusion adjacent to the interconnect and substantially perpendicular to the package substrate, a cavity bounded by the support protrusion, and a gap linking the cavity to the edge of the encapsulant.

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patent: 2008/0233684 (2008-09-01), Chee Peng et al.

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