Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate
2003-03-21
2004-11-02
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Multiple housings
C257S666000, C257S692000, C257S787000, C257S696000
Reexamination Certificate
active
06812556
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates, in general, to semiconductor device and, more particularly, to a multi-chip package having a plurality of chips.
This is a counterpart of and claims priority to Japanese patent application Serial Number 103967/2002, filed on Apr. 5, 2002, the subject matter of which is incorporated herein by reference.
2. Description of the Related Art
A conventional semiconductor device is disclosed in Japanese Patent Application Laid-Open No. 2001-7277, Hiroki ARISUMI. The conventional device has a die pad having an open portion. A signal position conversion part is mounted on the die pad. A first chip is mounted on one side of the signal position conversion part. A second chip is mounted on opposite side of the signal position conversion part in the open portion of the die pad. The first and second chips and the signal position conversion part are molded by resin, causing the die pad to be located central of the molded resin. In other words, an inner lead and the die pad are located on the same virtual plane.
However, the density of an upper portion of the molded semiconductor device is higher than one of a lower portion thereof. The amount of resin to be mold between the upper and lower portions is different. Therefore, resin may not be molded at an upper side of the first chip and the second chip in the open portion of the die pad, causing them to be exposed.
In addition, when a position of the die pad is lowered such that the resin density of the upper and lower portions is the same, a slope of a supporting lead located from the die pad to the inner lead becomes large and a length the supporting lead becomes long. The longer the length of the lead, the easier it is for the lead to become deformed. In addition, when the leads are mass-produced by manufacture machines, production tolerances of the lead are reduced.
Furthermore, the second chip is mounted on an opposite side of the signal position conversion part in the open portion of the die pad. When the second chip is molded by a resin, it is possible that the second chip is not correctly covered with resin causing a void to be generated. Therefore, the conventional semiconductor device can exhibit a crack which reduces yield.
SUMMARY OF THE INVENTION
According to one aspect of the present invention, there is provided A semiconductor device including a package body, a substrate contained within the package body and having a first side and an opposite second side, a first chip mounted on the first side of the substrate and within the package body, a second chip mounted on the second side of the substrate and within the package body and a plurality of leads each including an inner lead portion contained within the package body and an outer lead portion located outside the package body wherein each inner lead portion includes first and second bends to define a step configuration and wherein a distal end of each inner lead portion is mounted to the second side of the substrate.
The novel features of the invention will more fully appear from the following detailed description, appended claims and the accompanying drawings.
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Flynn Nathan J.
Greene Pershelle
Oki Electric Industry Co. Ltd.
Volentine Francos & Whitt PLLC
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