Multi-chip package having spacer that is inserted between...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip

Reexamination Certificate

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Details

C257S685000, C257S686000

Reexamination Certificate

active

07023096

ABSTRACT:
A multi-chip package includes a substrate with a chip mounting area and a first chip positioned in the mounting area. A spacer is attached to the active surface of the first chip and has a thickness to allow space for wire-bonding the first chip's active surface to the substrate. A second chip is attached to the spacer over the first chip. Conductive metal wires electrically connect the first and second chips to the substrate. A package body is formed by encapsulating the first and second chips and the conductive metal wires. Ends of the spacer extend to the edge the package body. External connection terminals are attached to the bottom surface of the substrate and a method for the manufacturing thereof.

REFERENCES:
patent: 5904497 (1999-05-01), Akram
patent: 6077724 (2000-06-01), Chen
patent: 6414384 (2002-07-01), Lo et al.
patent: 6472758 (2002-10-01), Glenn et al.
patent: 6531784 (2003-03-01), Shim et al.
patent: 6650006 (2003-11-01), Huang et al.
patent: 10-70232 (1998-03-01), None
patent: 10-270619 (1998-10-01), None
patent: 2000-0044989 (2000-07-01), None

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