Multi-chip package

Details Multi-chip package Multi-chip package

2011-06-07

2011-06-07

Doan, Theresa T (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

C257S777000, C438S109000

Reexamination Certificate

active

07956450

ABSTRACT:
A multi-chip package is presented which includes a substrate, a lower semiconductor, an upper semiconductor chip, metal wires, an encapsulant, and mounting units. The substrate has electrode terminals on an upper surface and ball lands on a lower surface. The lower semiconductor chip is placed face-down on the substrate. The lower semiconductor chip has first bonding pads, first connectors and metal patterns. The upper semiconductor chip is placed face-down type on the back surface of the lower semiconductor chip. The upper semiconductor has second bonding pads and second connectors. The metal wires electrically the lower semiconductor chip to the substrate. The encapsulant seals the substrate, the lower semiconductor chip, the upper semiconductor chip and the metal wires. The mounting units are on the lower surface of the substrate.

REFERENCES:
patent: 2003/0141583 (2003-07-01), Yang
patent: 1020070082627 (2007-08-01), None
patent: 1020080020376 (2008-03-01), None
patent: 1020080020393 (2008-03-01), None

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