Multi-chip package

Details Multi-chip package Multi-chip package

2006-09-12

2006-09-12

Tran, Mai-Huong (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Heterojunction device

Bipolar transistor

C257S777000, C257S673000, C257S780000

Reexamination Certificate

active

07105869

ABSTRACT:
A multi-chip package is provided. A first die pad has a first chip attaching surface and a first unoccupied surface. A second die pad has a second chip attaching surface and a second unoccupied surface. The connecting structures are used for connecting the first die pad and the second die pad. The inner leads has wire connecting surfaces. The wire connecting surfaces, the first chip attaching surface and the second unoccupied surface face the same direction. A first chip has a first active surface and a first inactive surface. The first inactive surface is attached to the first chip attaching surface. A second chip has a second active surface and a second inactive surface. Part of the second active surface is attached to the second chip attaching surface. The wires are used for electrically connecting the first active surface and the second active surface to the wire connecting surfaces.

REFERENCES:
patent: 6861760 (2005-03-01), Oka et al.
patent: 2004/0061202 (2004-04-01), Shim, II
patent: 443587 (2001-06-01), None
patent: 494554 (2002-07-01), None
patent: 510573 (2002-11-01), None

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