Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
2001-11-30
2004-09-14
Vu, Hung (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
Reexamination Certificate
active
06791178
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to a semiconductor module, to electronic equipment using the module and to a method of manufacturing the same.
Heretofore, so-called multi-chip modules have been used for miniaturizing the size and improving the performance of electronic devices, in which bare chips (various kinds of semiconductor devices and ICs having desired functions in the shape of chips are collectively referred to as bare chips in this specification) and various kind of passive elements, such as resistors, capacitors and coils, are connected in combination with each other to constitute a module.
SUMMARY OF THE INVENTION
However, in the existent multi-chip modules (MCM), since the heat expansion coefficient is different for semiconductor chips, for a substrate for mounting the semiconductor chips and for a substrate for mounting the substrate on which the semiconductor chips are mounted, thermal stress is generated during operation of the multi-chip module (MCM), thereby to bring about a problem in that the connection reliability can not be ensured.
Further, the manufacture of the multi-chip module (MCM) also involves the following problems; A ceramic wiring substrate for use in the multi-chip module is passed through the steps of baking and cooling during manufacture. In this process, the substrate is press bonded under lamination with a binder detaching from a green sheet and a conductor paste. Since the deformation rate is different in each of these elements, wirings tend to be deformed in a case of a fine wiring pattern. Further, while they are cooled from the sintering temperature, after the completion of the press bonding, since the ceramic substrate and the wiring material each cause thermal deformation also in this process, it was difficult to calculate the thermal deformation for the entire substrate in the manufacture of the multi-chip module. Accordingly, since the wiring width of the wiring substrate on which semiconductor chips are mounted increases, the number of layers of the wiring substrate increases, making it difficult to attain a thin and small mounting structure.
Japanese Patent Application Hei 8-527489 (International Laid-Open No. WO/97/03460) discloses a glass substrate for mounting semiconductor chips. However, the glass substrate is adapted to mount semiconductor chips on one surface, but wiring layers comprising insulation layers and conductor layers are not formed on both surfaces of the glass substrate.
Japanese Patent Laid-Open Hei 10-242206 discloses a substrate in which through holes are formed in light sensitive glass by using an exposure/developing process. The substrate is designed to serve both as an inspection substrate during burn-in upon mounting bare chips and as an interposer (material interconnecting a bare chip and an external terminal) for connection with a substrate, such as a printed circuit board, but it is not adapted to be formed with multiple wiring layers, comprising insulation layers and conductor layers, on a core substrate. Further, it does not disclose the formation of through holes by sand blasting.
Japanese Patent Laid-Open Hei 11-243267 discloses a wiring substrate in which wirings are formed on an insulation substrate having through holes. This publication indicates that the insulation substrate is formed of sintered ceramics, such as sintered glass ceramics, and is manufactured, for example, by forming a ceramic green sheet, applying an appropriate punching to the ceramic green sheet to form it into a predetermined shape and then sintering the same at a high temperature. Further, to form wirings which are less disconnected on the surface of the insulation substrate and the inner wall surface of the through holes, the diameter of a through hole is gradually enlarged from the center to both open ends of the substrate. As a method of forming a through hole, using a trigonal drilling blade or a laser fabrication method is disclosed. However, the insulation substrate is made of glass ceramics and is not a glass substrate, and multiple wiring layers comprising insulation layers and conductor layers are not formed on the insulation substrate.
The present invention intends to provide a multi-chip module having improved connection reliability between semiconductor chips and a wiring substrate on which semiconductor chips are mounted, as well as improved connection reliability between the multi-chip module and a mounting substrate on which the multi-chip module is mounted.
As a result of research and development, we have found that it is important to improve the constitution of a wiring, substrate by using a glass substrate having a surface smoothness and small heat expansion coefficient, as well as to provide a manufacturing process therefor which makes it possible to provide a wiring substrate that is capable of high density wiring at a reduced cost.
We have also found that it is important to provide a multi-layered wiring substrate with a stress relieving mechanism in order to improve the connection reliability of an electronic device using the wiring substrate, for example, a multi-chip module.
Among the aspects and features of the invention disclosed in this application for attaining the foregoing objects, an outline of typical aspects of the invention will be explained below.
A multi-chip module includes semiconductor devices and a wiring substrate for mounting the semiconductor devices, wherein the wiring substrate comprises a glass substrate having holes for, establishing electrical connection between both surfaces, and plural wiring layers each formed on the surface of the glass substrate and having wirings (conductor layer) and an insulation layer, the diameter of the hole being enlarged from one open end to the other open end.
A multi-chip module includes semiconductor devices and a wiring substrate for mounting the semiconductor devices, wherein the wiring substrate comprises a glass substrate having holes formed by sand blasting and a wiring layer formed on the surface of the glass substrate and having wirings and an insulation layer.
A multi-chip module as defined above, wherein the semiconductor devices and the wiring substrate are connected by means of a lead free solder.
A multi-chip module includes semiconductor devices and a wiring substrate for mounting the semiconductor devices, wherein the wiring substrate comprises a first substrate having through holes, a first wiring layer formed on one surface of the first substrate and having first wirings and a first insulation layer, a second wiring layer formed on the other surface of the first substrate and having second wirings and a second insulation layer, in which the heat expansion coefficient is different between the first wiring layer and the second wiring layer.
A multi-chip module as defined above, wherein the heat expansion coefficient of the first wiring layer is close to the heat expansion coefficient of the semiconductor device, and the heat expansion coefficient of the second wiring layer is close to the heat expansion coefficient of a mounting substrate for mounting the wiring substrate.
A multi-chip module has semiconductor devices and a wiring substrate for mounting the semiconductor devices, wherein the wiring substrate comprises a first substrate having through holes; a first wiring layer having first wirings and a first insulation layer formed to the surface of the first substrate on the side where the semiconductor devices are mounted; and a second wiring layer having second wirings and a second insulation layer formed to the surface of the first substrate on the side where the wiring substrate is mounted; wherein the heat expansion coefficient of the first wiring layer is close to the heat expansion coefficient of the semiconductor device, and the heat expansion coefficient of the second wiring layer is close to the heat expansion coefficient of a mounting substrate for mounting the wiring substrate.
A multi-chip module has semiconductor devices and a wiring substrate for mounting the semiconductor devices, wherein the
Hozoji Hiroshi
Kanda Naoya
Tenmei Hiroyuki
Terabayashi Takao
Yamaguchi Yoshihide
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