Multi-chip integrated circuit package

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip

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Details

257686, 257784, 257786, 257675, H01L 2348, H01L 2352, H01L 2940

Patent

active

057773459

ABSTRACT:
An electronic package which has a plurality of stacked integrated circuit dies. The package includes a first die that is mounted to a die paddle of a lead frame. The first die is also connected to the leads of the lead frame by bond wires. A second die is mounted to the top surface of the first die and electrically connected to the first die with bond wires. The first die, second die and die paddle are all enclosed by a package.

REFERENCES:
patent: 5177669 (1993-01-01), Juskey et al.
patent: 5216283 (1993-06-01), Lin
patent: 5422435 (1995-06-01), Takiar et al.
"COB and COC for Low Cost and High Density Package", Geroges Rochat, 1995 IEEE/CPMT Int'l Electronics Manufacturing Technology Symposium, pp. 109-111.

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