Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate
2004-04-02
2010-12-14
Nguyen, Ha Tran T (Department: 2829)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Multiple housings
C257S700000, C257S701000, C438S107000, C438S118000, C438S125000, C438S126000, C438S127000
Reexamination Certificate
active
07851899
ABSTRACT:
A BGA package is disclosed including a base IC structure having a base substrate, with an opening running length-wise there through. A first semiconductor chip is mounted face-down on the base substrate so the bond pads thereof are accessible through the opening. The package also includes a secondary IC structure including a secondary substrate, having an opening running there through, and a second semiconductor chip. The second chip is mounted face-down on the secondary substrate so that the bond pads thereof are accessible through the opening in the secondary substrate. An encapsulant fills the opening in the secondary substrate and forms a substantially planar surface over the underside of the secondary substrate. The substantially planar surface is mounted to the first chip of the base IC structure through an adhesive. Wires connect a conductive portion of the secondary IC structure to a conductive portion of the base IC structure.
REFERENCES:
patent: 6424033 (2002-07-01), Akram
patent: 6737750 (2004-05-01), Hoffman et al.
patent: 6987058 (2006-01-01), Hall
patent: 7005316 (2006-02-01), Lee et al.
patent: 7199453 (2007-04-01), Lai et al.
patent: 2001/0012526 (2001-08-01), Tandy
patent: 2002/0046854 (2002-04-01), Huang et al.
patent: 2002/0127771 (2002-09-01), Akram et al.
patent: 2002/0189852 (2002-12-01), Hirai et al.
patent: 2004/0061243 (2004-04-01), Bai
patent: 2004/0119152 (2004-06-01), Karnezos et al.
patent: 2005/0012195 (2005-01-01), Go et al.
patent: 2005/0040508 (2005-02-01), Lee
patent: 2007/0210433 (2007-09-01), Subraya et al.
Cha Wee Lim
Chen Fung Leng
Hetzel Wolfgang
Kim Seong Kwang Brandon
Sun Yi-Sheng Anthony
Infineon Technologies
Kusumakar Karen M
Nguyen Ha Tran T
Sughrue & Mion, PLLC
UTAC - United Test and Assembly Test Center Ltd.
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