Multi-channel receiver, digital edge tuning circuit and...

Details Multi-channel receiver, digital edge tuning circuit and... Multi-channel receiver, digital edge tuning circuit and...

2005-06-28

2008-11-11

Ha, Dac V (Department: 2611)

Pulse or digital communications

Synchronizers

C375S371000, C327S149000, C327S153000, C327S158000, C327S161000

Reexamination Certificate

active

07450675

ABSTRACT:
A multi-channel receiver, digital edge tuning circuit and a method for operating the same is disclosed. The digital edge tuning circuit for tuning phases of an input signal and a clock signal, comprises a delay-tuning circuit for receiving the input signal and delaying the input signal to generate a fine-tuned signal; a delay set comprising a plurality of delays connected serially one by one, the input of the delay set coupled to the fine-tune circuit, for receiving the fine-tuned signal; a plurality of sample/hold circuits, each of the sample/hold circuits coupled to a corresponding output of one of the delays and the fine-tune circuit, for sampling and holding the corresponding output; and a dynamic edge tuning circuit, coupled to the sample/hold circuits, for controlling a common delay time delayed by the delay-tuning circuit according to which one of the sample/hold circuits samples a data edge of the input signal.

REFERENCES:
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patent: 6937076 (2005-08-01), Gomm
patent: 2006/0001465 (2006-01-01), Kwak et al.

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