Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion
Reexamination Certificate
2002-10-10
2004-10-26
Wamsley, Patrick (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Digital to analog conversion
C341S135000, C341S136000
Reexamination Certificate
active
06809673
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a multi-channel integrated circuit (IC) in which a digital to analogue converter (DAC) is provided in each channel, and in which crosstalk is minimised. The invention also relates to a method for minimising crosstalk between the DACs in the respective channels.
BACKGROUND OF THE INVENTION
In signal processing ICs for audio, video and data communications, multi-channel processing circuits are required. Each channel is provided with a DAC, and comprises a digital input front end for receiving a digital input signal which is applied to the DAC, and an analogue output end from which an analogue output signal converted from the digital input signal is outputted or further processed. In the processing of audio, video and data signals, and in particular, in the processing of video signals in a multi-channel signal processing circuit, it is essential that the respective channels of the circuit be matched, and in particular, it is important that the analogue end of the DACs of the respective channels should be matched. Mismatch in the analogue ends of the respective DACs can lead to the DACs exhibiting different gain values. Processing effects and minor silicon variations in the die can lead to such mismatch. Various methods and circuitry are provided for minimising mismatch in such DACs, however, in general, such known methods and circuits tend to lead to an increase in crosstalk between the respective DACs. In many applications this is unacceptable.
DACs for use in multi-channel processing circuits for processing audio, video and data communications, in general, are current steering DACs, which comprise a plurality of current sources and associated differential current steering switches. The current steering switches are selectively operable in response to switch bits decoded from a digital word for steering currents from the current sources to either one of a pair of summing nodes for providing an analogue signal corresponding to the digital word. Such current steering DACs may be linear decoded DACs or binary weighted DACs, or may be provided by a combination of both. In a linearly decoded DAC, the DAC current sources are identical to each other, and the differential switches are of identical size. M DAC current sources are provided to convert an N-bit digital word where M is equal to 2
N
−1. In a binary weighted DAC, the DAC current sources are binary weighted, the current source corresponding to the least significant bit (LSB) providing a current of 2
0
units, while the current source corresponding to the second least significant bit provides a current of 2
1
units, and the current source corresponding to the third least significant bit provides a current of 2
2
units, and so on to the most significant bit, which in an N-bit DAC provides a current of 2
N−1
units. The corresponding differential switches are correspondingly binary scaled in size.
The current sources in general are provided by current source devices, typically, MOSFETs coupled to a common supply rail which mirror a reference current provided by a reference circuit. The reference circuit in general comprises a reference current device typically provided by a reference MOSFET coupled to the common supply rail, an amplifier, and a reference resistor. The gates of the current source devices are electrically tied to the gate of the reference FET. The output of the amplifier provides a bias voltage for biasing the gate of the reference current device and the gates of the current source devices. One input of the amplifier is connected to a reference voltage, while the other input is connected to the reference resistor. The reference current device is connected to ground through the reference resistor. The amplifier outputs a voltage which biases the gate of the reference and a reference current is forced through the reference current device and the reference resistor until the voltage across the reference resistor is equal to the reference voltage. The reference current is mirrored in the current source devices. Thus, the value of the reference current, and in turn the gain of the DAC can readily be determined by appropriately selecting the value reference voltage and the resistance value of the reference resistor. In order to facilitate applying a reference voltage to one of the inputs of the amplifier and to facilitate the connection of a reference resistor to the other input of the amplifier and ground, two additional pins are required to the reference circuit.
In order to minimise mismatching, it is known to provide a separate reference circuit for each DAC in a multi-channel signal processing circuit, so that the reference circuits can be located adjacent the corresponding DAC in order to minimise mismatching due to processing effects and silicon variations. However, a disadvantage of providing a separate reference circuit for each DAC is that the die area required for the reference circuits is relatively large in order to accommodate the amplifiers of the respective reference circuits. This is undesirable. Additionally, two extra external pins are required for each reference circuit in order to apply the reference voltages to the amplifiers and in order to connect the respective reference resistors to the amplifiers. Since the trend now is to minimise the number of pins required to an integrated circuit, this is undesirable.
In order to minimise the die area and the number of external pins required by DACs in multi-channel processing circuits, it is known to provide only one reference circuit for all the DACs, and the reference circuit is shared between the DACs. The reference circuit comprises a single amplifier, and the appropriate number of reference current devices are provided connected in parallel between the supply rail and the reference resistor so that one reference current device is provided for each DAC. The respective reference current devices are located as closely as possible to the corresponding DACs. Since only a single amplifier is provided for providing the bias voltage to the reference current devices, the gates of the reference current devices are electrically tied together, thereby causing the gates of the current source devices of all the DACs to be electrically tied together. This results in crosstalk between the respective DACs. The crosstalk results from voltage swings on the current steering switches of one DAC being capacitively fed through to the gates of the current source devices corresponding to the current steering switches of the DAC, thereby modulating the bias voltage on the gates of the current source devices of that DAC. Due to the fact that the gates of the current source devices of the respective DACs are electrically tied together, modulation of the bias voltage on the gates of the current source devices of one DAC appears on the gates of the current source devices of the other DACs, thus causing modulation of the current being steered to the summing nodes of those other DACs, which causes the crosstalk.
In order to minimise the effect of capacitive feedthrough of the voltage swings on the current steering switches to the gates of the corresponding current source devices, it is known to connect an external capacitor between the gates of the current source devices of each DAC and the supply rail, thus minimising crosstalk. However, this requires an external pin to be provided from the gates of the current source devices of each DAC in order to facilitate connection of the respective capacitors during calibration of the respective DACs. This is undesirable, since it increases the pin count of the DACs, and in turn the signal processing circuit, and furthermore does not entirely eliminate crosstalk.
There is therefore a need for a multi-channel circuit comprising DACs in the respective channels of the circuit which overcomes this problem.
The present invention is directed towards providing such a multi-channel circuit, and the invention is also directed towards providing a method for minimising crosstalk betw
Purcell John Patrick
Scanlan Anthony
Analog Devices Inc.
Iandiorio & Teska
Wamsley Patrick
LandOfFree
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