Multi-cell delay generator device wherein the cells have...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Having specific delay in producing output waveform

Reexamination Certificate

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Details

C377S048000, C377S117000, C377S122000

Reexamination Certificate

active

06297681

ABSTRACT:

BACKGROUND OF THE INVENTION
The invention relates to a digital delay generator device as recited in the preamble of claim
1
. Such devices may constitute a loop, thereby forming a ring counter, or rather a device without retrocoupling: The latter configuration will impart a straightforward delay. Dual-modulus or multi-modulus devices of this form, and in particular in the retrocoupled version, constitute an important and integral part of frequency synthesizers that are based on phase-locked loops. Ultimately, the properties of the circuit will determine the highest frequency that the overall device can attain. An earlier version of the device in effect did immediately follow an RF amplifier, and had added various extra transistors to the controllable stages, both in series with the other transistors of the stack in question, and also in parallel therewith. In effect, these added facilities proved to limit the attainable clock frequency to a low value. Next to minimizing the stack height, the minimizing of the number of nodes would be a further goal of the designer.
SUMMARY TO THE INVENTION
In consequence, amongst other things, it is an object of the present invention to propose a device as recited in the preamble, wherein a lesser stack height, as well as a lower number of nodes would allow to operate the circuit at a raised input clock frequency. Now therefore, according to one of its aspects the invention is characterized according to the characterizing part of claim
1
.
By itself, JP Patent Application Laid Open A 55/133 135 discloses a frequency dividing circuit, wherein a single cell has an extra transistor bridging one of the stack transistors. However, this facility does not provide a digital amending of the overall division factor, but rather an analog amending of the delay of just one cell. In consequence, the electronic functionality of the earlier circuit is radically different from that of the present circuit.
The present invention also relates to a comprehensive electronic circuit and to a portable telecommunications apparatus provided with a device according to the invention. At the present state of technology, there is a great need for raising of the operational frequency of such devices at a low level of power consumption. Further advantageous aspects of the invention are recited in dependent claims.


REFERENCES:
patent: 4953187 (1990-08-01), Herold et al.
patent: 6100730 (2000-08-01), Davis et al.
patent: WO9008428 (1990-07-01), None
Japanese Abstract 55-133135(A) Date Oct. 16, 1980; Appl. No. 54-401149.

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