Multi-carrier transmission systems

Multiplex communications – Communication techniques for information carried in plural... – Combining or distributing information via frequency channels

Reexamination Certificate

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Details

C370S206000, C370S207000

Reexamination Certificate

active

06181714

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to multi-carrier transmission systems in which a receiver clock is recovered from a pilot carrier transmitted with a fixed phase, a transceiver and a receiver for use with such multi-carrier transmission systems, and a method, for use in such multi-carrier transmission systems, of recovering a receiver sampling clock from a pilot carrier.
2. Discussion of the Background
The demand for provision of multi-media and other bandwidth services over telecommunications networks has created a need to transmit high bit rate traffic over copper pairs. This requirement has led to the development of a number of different transmission schemes, such as, ADSL and VDSL. One of the more likely modulation systems for all these transmission schemes is a line code known as DMT (discrete multi-tone), which bears some resemblance to orthogonal frequency division multiplex, and is a spread spectrum transmission technique.
In discrete multi-tone transmission, the available bandwidth is divided into a plurality of sub-channels each with a small bandwidth, 4 kHz perhaps. Traffic is allocated to the different sub-channels in dependence on noise power and transmission loss in each sub-channel. Each channel carries multi-level pulses capable of representing up to 11 data bits. Poor quality channels carry fewer bits, or may be completely shut down.
Because inter pair interference in copper pair cables is higher where data is transmitted in both directions, i.e. symmetric duplex, a number of transmission schemes have proposed the use of asymmetric schemes in which high data rates are transmitted in one direction only. Such schemes meet many of the demands for high bandwidth services, such as, video-on-demand but, in the long term, symmetric duplex systems will be required.
VDSL technology resembles ADSL to a large degree, although ADSL must cater for much larger dynamic ranges and is considerably more complex as a result. VDSL is lower in cost and lower in power, and premises VDSL units need to implement a physical layer media access control for multiplexing upstream data.
Four line codes have been proposed for VDSL:
CAP; Carrierless AM/PM, a version of suppressed carrier QAM, for passive NT configurations, CAP would use QPSK upstream and a type of TDMA for multiplexing (although CAP does not preclude an FDM approach to upstream multiplexing);
DMT; Discrete Multi-Tone, a multi-carrier system using Discrete Fourier Transforms to create and demodulate individual carriers, for passive NT configurations; DMT would use FDM for upstream multiplexing (although DMT does not preclude a TDMA multiplexing strategy);
DWMT; Discrete Wavelet Multi-Tone, a multi-carrier system using Wavelet Transforms to create and demodulate individual carriers, DWMT also uses FDM for upstream multiplexing, but also allows TDMA; and
SLC; Simple Line Code, a version of four-level baseband signalling that filters the base band and restores it at the receiver, for passive NT configurations; SLC would most likely use TDMA for upstream multiplexing, although FDM is possible.
Early versions of VDSL will use frequency division multiplexing to separate downstream from upstream channels and both of them from POTS and ISDN. Echo cancellation may be required for later generation systems featuring symmetric data rates. A rather substantial distance, in frequency, will be maintained between the lowest data channel and POTS to enable very simple and cost effective POTS splitters. Normal practice would locate the downstream channel above the upstream channel. However, the DAVIC specification reverses this order to enable premises distribution of VDSL signals over coaxial cable systems.
In multi-carrier transmission systems using, for example, DMT, it is known to recover a receiver sampling clock from a reserved carrier, a pilot carrier, having a fixed phase. A sampling clock oscillator in a receiver is then phase-locked to the pilot carrier.
Multi-carrier receivers, such as DMT receivers, are normally equipped with a FFT processor. A complex number representing the pilot carrier is then available from the FFT processor output. If a FFT processor is not available, a one-frequency DFT processor can be provided to produce a complex estimate of the pilot carrier. In a DMT system, such as MUSIC, which is described in this specification, frame synchronization is handled separately from sampling clock synchronization, although the two processes are intimately related and frame synchronization must be acquired before sampling clock synchronization.
SUMMARY OF THE INVENTION
In the present invention, the receiver sampling clock oscillator is controlled by a feedback controller in such a way that the pilot carrier argument converges towards zero. The pilot carrier estimate generated by the FFT processor, or DFT processor, is a complex number. The argument of this complex number must be calculated and used as the feedback signal to control the receiver sampling clock. The high resolution required by DMT systems means that it is not feasible to use look-up tables as a method of determining the argument of the pilot carrier estimate.
Although the present invention has been devised primarily for use with DMT systems, it is believed that it will find application to other multi-carrier systems such as OFDM systems and systems employing wavelet transforms rather than fourier transforms.
It is an object of the present invention to provide a method of synchronizing a receiver sampling clock with a pilot carrier by using an approximation of the scaled argument of a complex number representing the pilot carrier which retains the full resolution of the complex number.
It is an object of the present invention to provide a receiver in which a receiver sampling clock is synchronized with a pilot carrier by using an approximation of the scaled argument of a complex number representing the pilot carrier which retains the full resolution of the complex number.
It is an object of the present invention to provide a transceiver in which a receiver sampling clock is synchronized with a pilot carrier by using an approximation of the scaled argument of a complex number representing the pilot carrier which retains the full resolution of the complex number.
It is an object of the present invention to provide a multi-carrier transmission system in which a receiver sampling clock is synchronized with a pilot carrier by using an approximation of the scaled argument of a complex number representing the pilot carrier which retains the full resolution of the complex number.
According to a first aspect of the present invention, there is provided a receiver, for use with a multi-carrier transmission system using orthogonal carriers, in which a receiver sampling clock is synchronized with a transmitter sampling clock by phase locking said receiver sampling clock to a pilot carrier, characterised in that said receiver includes a feedback loop adapted to control an oscillator means, said feedback loop using a feedback signal representative of an argument estimate of said pilot carrier, in that said feedback signal is derived from an approximation of an argument of a complex number representative of said pilot carrier, said approximation retaining a full resolution of said complex number, and in that said feedback loop controls said oscillator means so that said pilot argument tends to zero.
Said feedback loop may be adapted to compensate for channel effects.
Said oscillator means may be a VCXO.
Said multi-carrier transmission system may be a DMT transmission system.
Said multi-carrier transmission system may be a DMT based VDSL system.
Said receiver may include pilot argument estimation means adapted to produce said feedback signal, and said pilot argument estimation means may be connected to feedback controller means which may be connected, via a D/A, to said oscillator means.
Said feedback signal may function as an equalizer parameter and cause said oscillator means to be adjusted in a manner which compensates for

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