Static information storage and retrieval – Addressing – Sync/clocking
Patent
1998-03-12
1999-05-11
Tran, Andrew Q.
Static information storage and retrieval
Addressing
Sync/clocking
36523003, 36523006, G11C8/00
Patent
active
059035145
ABSTRACT:
In a multi-bank semiconductor memory device, if only one bank is in the active state, a bank drive signal generating circuit supplies, operation mode designation signals corresponding to an operation mode instruction signal supplied from a command decoder according to array activation signals from bank driving circuits provided corresponding to banks respectively, to the bank driving circuit provided for the bank in the active state. The state of the bank address signal is arbitrary. Accordingly, control of bank designation in the multi-bank semiconductor memory device is simplified.
REFERENCES:
patent: 5796673 (1998-08-01), Foss et al.
Mitsubishi Denki & Kabushiki Kaisha
Tran Andrew Q.
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