Multi-bank clock synchronous type semiconductor memory device ha

Static information storage and retrieval – Addressing – Plural blocks or banks

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365 51, 365 63, 36518909, 365226, G11C 800

Patent

active

060646217

ABSTRACT:
A rectangular semiconductor substrate region is divided into regions arranged in a plurality of rows and columns, and memory array blocks are provided to surround a central region. The plurality of memory array blocks are divided into a plurality of banks. Peripheral regions on both sides of the rectangular semiconductor substrate region are used as regions for providing sense amplifier power supply circuits, and circuits for generating a voltage to be transmitted onto word lines are provided at the four corner regions of the central region. Thus, a large storage capacity semiconductor memory device operating stably at a high speed and with reduced power consumption can be implemented.

REFERENCES:
patent: 5838627 (1998-11-01), Tomishima et al.
patent: 5862096 (1999-01-01), Yasuda et al.
patent: 5894448 (1999-04-01), Amano et al.
patent: 5943285 (1999-08-01), Kohno

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