Multi-bank architecture for a wide I/O DRAM

Details Multi-bank architecture for a wide I/O DRAM Multi-bank architecture for a wide I/O DRAM

1998-05-13

1999-11-02

Nelms, David

Static information storage and retrieval

Addressing

Plural blocks or banks

36523006, 365 51, G11C 800

Patent

active

059783028

ABSTRACT:
An architecture for a multi-bank DRAM is described which utilizes banks which are staggered in order to increase the amount of data which can be accessed at any one time. The banks are staggered such that a portion of each bank is provided on opposite sides of a data path so that a single address can simultaneously specify both portions of the bank so that twice the amount of data can be accessed.

REFERENCES:
patent: 5406526 (1995-04-01), Sugibayashi et al.
patent: 5636174 (1997-06-01), Rao

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