MR resistive-biasing scheme providing low noise high common-mode

Details MR resistive-biasing scheme providing low noise high common-mode MR resistive-biasing scheme providing low noise high common-mode

1997-01-22

1999-01-05

Psitos, A.

Dynamic magnetic information storage or retrieval

General recording or reproducing

Specifics of biasing or erasing

360 67, 330258, G11B 503

Patent

active

058568913

ABSTRACT:
The present invention is a system for reading information stored on a plurality of disk surfaces. The system comprises a plurality of channels each containing a preamplifier having first and second terminals for connection to an MR head. A bias circuit is provided common to all of the plurality of channels. The preamplifier in each channel includes first and second channel select circuits responsive to first and second channel select signals and current output from the bias circuit to output currents based on the current's output from the bias circuit. The preamplifier in each channel also includes first and second complementary output transistor circuits responsive to the current's output from the first and second channel select circuits and to the first and second voltages to provide bias current through the respective MR head connected between the first and second terminals of the respective channel. The system is entirely symmetrical around ground for improved common mode rejection. In another aspect of the system, first and second supply rejection circuits are provided to stabilize voltages at the first and second terminals for variations in the positive and negative power supplies.

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