MPEG motion compensation using operand routing and performing ad

Details MPEG motion compensation using operand routing and performing ad MPEG motion compensation using operand routing and performing ad

1996-12-31

1999-11-23

Ellis, Richard L.

Electrical computers and digital processing systems: processing

Processing architecture

Vector processor

712 3, 712 6, 712 14, 712 22, 712208, 712221, G06F 1300

Patent

active

059918659

ABSTRACT:
A routable operand and selectable operation processor multimedia extension unit is employed to motion compensate MPEG video using improved vector processing. A vector processing unit executes an add and divide instruction that adds two vector registers and divides the result in a single instruction. This is implemented through loading a first vector register with a first plurality of elements from a source block. A second vector register is then loaded with a second plurality of elements that are adjacent to the first plurality of elements. The add and divide instruction is then executed on the first and second vector registers, yielding an interpolated source element that is stored in a resultant vector register.

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