Computer graphics processing and selective visual display system – Display driving control circuitry – Controlling the condition of display elements
Patent
1996-11-13
1999-02-09
Nguyen, Phu K.
Computer graphics processing and selective visual display system
Display driving control circuitry
Controlling the condition of display elements
G06T 1300
Patent
active
058700870
ABSTRACT:
An MPEG decoder system and method for performing video decoding or decompression which includes a unified memory for multiple functions according to the present invention. The video decoding system includes transport logic, a system controller, and MPEG decoder logic. The video decoding system of the present invention includes a single unified memory which stores code and data for the transport, system controller and MPEG decoder functions. The single unified memory is preferably a 16 Mbit memory. The MPEG decoder logic includes a memory controller which couples to the single unified memory, and each of the transport logic, system controller and MPEG decoder logic access the single unified memory through the memory controller. The video decoding system implements various frame memory saving schemes, such as compression or dynamic allocation, to more efficiently use the memory. In one embodiment, the memory is not required to store reconstructed frame data during B-frame reconstruction, thus considerably reducing the required amount of memory for this function. Alternatively, the memory is only required to store a portion of the reconstructed frame data. In addition, these savings in memory allow portions of the memory to also be used for transport and system controller functions. The present invention thus provides a video decoding system with reduced memory requirements.
REFERENCES:
patent: 5675511 (1997-10-01), Prasad et al.
patent: 5692213 (1997-11-01), Goldberg et al.
patent: 5767846 (1998-06-01), Nakamura et al.
Hood Jeffrey C.
LSI Logic Corporation
Nguyen Phu K.
Vo Cliff N.
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