Moving picture encoding apparatus and method

Television – Bandwidth reduction system – Data rate reduction

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348402, 348412, 348699, 348718, H04N 7137, H04N 7133

Patent

active

054082692

ABSTRACT:
In a picture encoding apparatus, detection of a moving vector of half-pixel precision is executed by using a single clock without increasing the number of frame memories. Time-series input pixel data is transformed into parallel pixel data; the parallel pixel data obtained through the transformation is interpolated to thereby generate interpolating data on each pixel in an area specified by a moving vector of one-pixel precision. The interpolation data is output in parallel as pixel data on a plurality of interpolation block areas obtained by displacing by 1/2 pixel the block area specified by the moving vector at one-pixel unit, thereby making it possible to quickly obtain interpolation data solely on a region around the area specified by the moving vector at one-pixel unit. With this arrangement, interpolation can be executed with a substantially simplified construction as compared to the prior art, making it possible to easily detect a moving vector of half-pixel precision without increasing the number of frame memories of clock frequency.

REFERENCES:
patent: 4862267 (1989-08-01), Gillard et al.
patent: 4937666 (1990-06-01), Yang
patent: 5030953 (1991-07-01), Chiang
"Very High Efficiency VLSI Chip-Pair for Full Search Block Matching With Fractional Precision," Kun-Min Yang et al., pp. 2437-2440, CH2673-2/.80/0000-2437--1989 IEEE.

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