Moving picture decoding system

Details Moving picture decoding system Moving picture decoding system

1997-06-13

1998-05-19

Lee, Richard

Television

Bandwidth reduction system

Data rate reduction

348407, 348416, 348420, 348699, H04N 732

Patent

active

057542341

ABSTRACT:
An adder restores an image data by adding an output of a reverse DCT portion and an output of a predicted value calculating portion to output to a macro-block buffer. Data temporarily stored in the macro-block buffer is written in a predicting dynamic memory per a unit of data of one word consisted of 2.times.2 blocks of luminance component (Y), 1.times.2 blocks of Cr component and 1.times.2 blocks of Cb components, via a memory data bus. A prediction reference block of the preceding frame stored in the predicting dynamic memory is output to a reference block buffer via the memory data bus. A restored image data of the preceding frame in the predicting dynamic memory is output to a line buffer via the memory data bus.

REFERENCES:
patent: 5130786 (1992-07-01), Murata et al.
patent: 5237424 (1993-08-01), Nishino et al.
patent: 5347308 (1994-09-01), Wai
Signal Processing Image Communication, vol. 2, Aug. 1990, pp. 127-144, A. Puri et al. "Video coding with motion-compensated interpolation for CD-ROM applications".
ELEKTRONIK, vol. 41, No. 9, Nov. 1992, pp. 72-75, M. Querol, "MPEG/H261/Videodecoder mit wenigen Chips" (no translation).

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