Moving picture decoding device

Details Moving picture decoding device Moving picture decoding device

1993-12-14

1999-12-28

Lee, Richard

Television

Bandwidth reduction system

Data rate reduction

348699, 348714, H04N 732

Patent

active

060088508

ABSTRACT:
The horizontal address and the vertical address of a picture image are arrayed at the lower and upper order sides, respectively, and allocated to a lower order side column address and an upper order side column address of the synchronous DRAM employed as a picture memory, respectively. A bank switching address is allocated between the upper most bit of the horizontal address and the lower most bit of the row address to enable data to be read continuously to achieve high-speed accessing and improve the utilization efficiency of the data bus.

REFERENCES:
patent: 4967397 (1990-10-01), Walek
patent: 4991013 (1991-02-01), Kobayashi
patent: 5195182 (1993-03-01), Sasson
patent: 5247355 (1993-09-01), Frederiksen
patent: 5267334 (1993-11-01), Normille et al.
patent: 5315388 (1994-05-01), Shen et al.
patent: 5353063 (1994-10-01), Yagisawa et al.
B. Prince, et al., A New Era of Fast Dynamic RAMs, IEEE Spectrum, vol. 29, No. 10, (Oct. 1992), pp. 43-49.

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