Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
2000-06-19
2002-03-26
Gaffin, Jeffrey (Department: 2841)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C174S261000, C174S262000, C361S743000, C361S760000, C361S783000, C361S803000, C257S738000, C257S774000, C257S778000
Reexamination Certificate
active
06362437
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a mounting structure of an integrated circuit device suitable for usage, for example, when LSI and the like are mounted on a printed wiring board, and a method of mounting the same.
2. Description of the Related Art
In recent years, a surface mounting technique using an interposer board has been employed in an electronic apparatus, such as a large computer and the like, in many cases, associated with an integrated circuit of high density.
Conventionally, a structure as shown in
FIG. 1
has been employed as a structure in which this type interposer board is used to mount an integrated circuit device on a mounting board.
This mounting structure of the integrated circuit device will be described below with reference to FIG.
1
. In
FIG. 1
, the mounting structure of the integrated circuit device is denoted by a symbol
41
. The mounting structure
41
has a mounting board
42
, the interposer board
43
and an integrated circuit device
44
.
The mounting board
42
is a printed wiring board, and accommodated in a body of an electronic apparatus (not shown). The interposer board
43
has a through-hole
43
a
, and is connected to the mounting board
42
with a solder bump (eutectic solder ball)
45
. The solder bump
45
is used for connecting the interposer board
43
to the mounting board
42
.
In a plan view (not shown) of the mounting structure
41
, a plurality of the solder bump
45
are arrayed in a grid form except a center portion of the plan view on positions corresponding to terminals (not shown) of the integrated circuit device
44
. A stress buffering resin
46
made of epoxy resin is interposed between the interposer board
43
and the mounting board
42
.
The integrated circuit device
44
is an LSI chip and connected to the interposer board
43
with a solder bump (solder ball with a high melting point)
47
. The solder bump
47
is used for connecting the integrated circuit device
44
to the interposer board
43
. That is, the integrated circuit device
44
is mounted through the interposer board
43
on the mounting board
42
by using both the solder bumps
45
,
47
.
In the plan view of the mounting structure
41
, a plurality of the solder bump
47
are arrayed in a grid form except the center portion, similarly to the solder bump
45
. A stress buffering resin
48
made of epoxy resin is interposed between the integrated circuit device
44
and the interposer board
43
.
The following is a method of mounting the integrated circuit device
44
on the mounting board
42
, in such mounting structure
41
. At first, the integrated circuit device
44
is placed through the solder bump
47
on the interposer board
43
. Then, the stress buffering resin
48
is injected between the integrated circuit device
44
and the interposer board
43
. After that, the interposer board
43
is placed through the solder bump
45
on the mounting board
42
. After that, the stress buffering resin
46
is injected between the mounting board
42
and the interposer board
43
.
By the way, in this type mounting structure of the integrated circuit device, there is a temperature variation between a time of the mount work and a time after the mount work or between an operation of the device and a non-operation of the device. As a result, if free expansions and contractions of the integrated circuit device
44
, the interposer board
43
and the mounting board
42
are obstructed because of difference between thermal expansions of the respective materials, tension and compression are applied to the integrated circuit device
44
and both the boards
42
,
43
. Thus, this results in the occurrence of thermal stress corresponding to distortion corresponding to deformation caused by the above-mentioned tension and compression.
In this case, if the connection (contact) areas of the respective solder bumps
45
,
47
to the mounting board
42
, the interposer board
43
and the integrated circuit device
44
are equal to each other, the thermal stress is equally dispersed to and left in the respective solder bumps
45
,
47
, at a normal temperature. This may be understood from
FIG. 2
which shows the relationship between a stress per bump (pad) (a vertical axis) and the number of relative total pads (a horizontal axis).
Thus, the integrated circuit device
44
together with the stress buffering resins
46
,
48
may be retained through the interposer board
43
on the mounting board
42
by the solder bumps
45
,
47
until stresses applied to the solder bumps
45
,
47
reach yield points of the materials of the solder bumps
45
,
47
.
In the conventional mounting structure of the integrated circuit device, the stress buffering resins
46
,
48
are injected into and interposed in a gap between the mounting board
42
and the interposer board
43
as well a gap between the integrated circuit device
44
and the interposer board
43
. Thus, those stress buffering resins
46
,
48
can not be filled in the gaps. That is, it is impossible to surely place the stress buffering resin in a desirable position in the gaps. Moreover, it is impossible to attain the excellent connection strength to be attained by the solder bumps
45
,
47
.
This reason is as follows. The gap formed between the mounting board
42
and the interposer board
43
as well as between the integrated circuit device
44
and the interposer board
43
is very narrow in dimension. Thus, if the stress buffering resins
46
,
48
are injected into the gaps, those stress buffering resins
46
,
48
cause babble to be easily induced. Hence, this babble obstructs the injection of the stress buffering resins
46
,
48
. Or, the babble causes the external force to be applied to the solder bumps
45
,
47
in a direction in which they are separated from the mounting board
42
and the interposer board
43
.
As a result, it is impossible to sufficiently insure the supply amounts of the stress buffering resins, and also impossible to surely carry out the connections between the solder bumps. This results in a problem of reducing the effect of buffering the stress and the reliability of connection by the solder bumps.
Also, the interposition of the stress buffering resin
46
between the mounting board
42
and the interposer board
43
increases the number of work processes at a time of the mount work, which results in a problem that the mount work becomes complex.
Japanese Laid Open Patent Application (JP-A-Heisei, 1-117049) discloses a conventional technique as an apparatus for cooling an integrated circuit device. In this apparatus, at least one or more integrated circuit device chips are mounted on an electrical printed wiring board through solder ball. In the apparatus for cooling the integrated circuit device that seals by using a sealing cap so as to cover the integrated circuit device chip, the rear side of the integrated circuit device chip and the inner surface of the sealing cap are finely divided and joined to each other by using a high temperature conductive jointing material. However, this apparatus does not solve the above-mentioned problems.
The present invention is accomplished in view of the above mentioned problems. Therefore, an object of the present invention is to provide a mounting structure of an integrated circuit device which can improve the effect of buffering the stress and the reliability of the connection by the solder bumps and also simplify the mount work, and a method of mounting the same.
Another object of the present invention is to provide an integrated circuit device, which can improve the effect of buffering the stress and the reliability of the connection by the solder bumps by noticing that the interposer board has a function of preventing a radioactive ray (&agr; line) generated from the solder from entering into the integrated circuit device from the side of the mounting board and then interposing the solder bump between the mounting board and the interposer board as the stress buffering material, and a
Gaffin Jeffrey
Young & Thompson
LandOfFree
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