Motor control system and image forming apparatus using the same

Electricity: motive power systems – Plural – diverse or diversely controlled electric motors – Parallel connected motors

Reexamination Certificate

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Details

C318S034000, C318S051000, C318S053000, C318S111000, C318S113000

Reexamination Certificate

active

06281645

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a motor control system, and more particularly to a motor control system in which a plurality of electric motors can be controlled by a single MPU (microprocessor unit). This invention further relates to an image forming apparatus using such a motor control system.
2. Description of the Related Art
FIG. 7
shows a typical conventional motor control circuit. Motor control circuits using a MPU
50
are broadly divided into a constant-current system motor control circuit and a constant-voltage system motor control circuit. The motor control circuit shown in
FIG. 7
is of a constant-current system. In the motor control circuit, pulse motors PM (PM
1
, PM
2
and PM
3
) are driven under the control of control signals which are respectively input into drivers
51
(driver
1
, driver
2
and driver
3
) each having a clock terminal CLK (CLK
1
, CLK
2
, CLK
3
) through which a clock for controlling the rotating speed of the motor is input, an enabling terminal ENB (ENB
1
, ENB
2
, ENB
3
) for controlling whether the motor is to be rotated, and a clockwise/counterclockwise terminal CW/CCW (CW/CCW
1
, CW/CCW
2
, CW/CCW
3
).
As shown in
FIG. 7
, when a plurality of pulse motors PM
1
to PM
3
are controlled by a single MPU
50
, control signals for the respective motors PM
1
to PM
3
are discretely connected to the MPU
50
.
When the MPU
50
has a built-in clock generation means such as an integrated timer controller ITC, pulse motors more than the number of channels which the built-in integrated timer controller ITC can use cannot be controlled unless an additional integrated timer controller
52
is provided. For example, in the example shown in
FIG. 7
, the third motor PM
3
is controlled by the additional integrated timer controller
52
.
Such an additional integrated timer controller adds to cost and requires an additional space on the circuit board, which adds to the size of the circuit board.
Generally the MPU
50
is provided with an integrated timer controller ITC having a plurality of channels. When the MPU
50
is incorporated in an apparatus having various mechanisms and processing means (e.g., an image forming apparatus to be described later), all the channels of the integrated timer controller cannot be used for controlling the motors but a part of the channels must be used for controlling other mechanisms and/or the processing means in the apparatus, which gives rise to the aforesaid problem.
For example, in a stencil printer as an example of the image forming apparatus, the number of objects to be controlled by the MPU has been increasing as the number of automated functions of the printer is increased. For example, in the current stencil printer, a large number of motors including those for adjusting the printing position on the printing paper in the longitudinal direction and the transverse direction, for supplying printing papers, and discharging printing papers are incorporated.
Though a plurality of MPU's have been incorporated in the current stencil printer by the function, increasing objects to be controlled has come to require additional integrated timer controllers.
SUMMARY OF THE INVENTION
In view of the foregoing observations and description, the primary object of the present invention is to provide a motor control system which can control motors larger in number than the number of the channels of the timer controller for generating clocks without increasing a timer controller.
Another object of the present invention is to provide an image forming apparatus employing such a motor control system.
In accordance with a first aspect of the present invention, there is provided a motor control system comprising
a processor having a clock output terminal for outputting clock pulses in desired cycles,
a plurality of motors, and
a plurality of motor drivers which are provided one for each motor and drive the corresponding motors on the basis of the clock pulses input into the motor drivers through respective clock input terminals thereof,
wherein the improvement comprises that the clock input terminals of the motor drivers are connected to the clock output terminal of the processor in common with each other.
In one embodiment of the present invention, the processor outputs an enabling signal exclusively to one of the motor drivers, thereby enabling said one motor driver to start driving the corresponding motor.
In another embodiment, the processor outputs an enabling signal to two or more of the motor drivers at one time, thereby enabling the motor drivers to start driving the corresponding motors.
In accordance with a second aspect of the present invention, there is provided a motor control system comprising
a processor having first and second clock output terminals and a plurality of enabling signal output terminals, the first and second clock output terminals outputting first and second clock pulses in desired cycles and in phases different from each other by a predetermined amount,
a plurality of motors, and
a plurality of motor drivers which are provided one for each motor and drive the corresponding motors in a constant-voltage drive mode on the basis of the first and second clock pulses input into the motor drivers from the first and second clock output terminals through first and second clock input terminals of each of the motor drivers and the enabling signals selectively input into the motor drivers through the enabling signal output terminals of the processor,
wherein the improvement comprises that the first clock input terminals of the motor drivers are connected to the first clock output terminal of the processor in common with each other, and the second clock input terminals of the motor drivers are connected to the second clock output terminal of the processor in common with each other.
In accordance with a third aspect of the present invention, there is provided a motor control system comprising
a processor having a clock output terminal, a plurality of enabling signal output terminals, and a plurality of rotating direction signal output terminals, the clock output terminal outputting clock pulses in desired cycles,
a plurality of motors, and
a plurality of motor drivers which are provided one for each motor and drive the corresponding motors in a constant-current drive mode on the basis of the clock pulses input into the motor drivers from the clock output terminals through a clock input terminal of each of the motor drivers and the enabling signals and the rotating direction output signals selectively input into the motor drivers respectively through the enabling signal output terminals and the rotating direction output terminals of the processor,
wherein the improvement comprises that the clock input terminals of the motor drivers are connected to the clock output terminal of the processor in common with each other.
In accordance with a fourth aspect of the present invention, there is provided an image forming apparatus which is for forming an image on a printing paper and is provided with a plurality of motors and a motor control system for controlling the motors, the motor control system comprising
a processor having a clock output terminal for outputting clock pulses in desired cycles, and
a plurality of motor drivers which are provided one for each motor and drive the corresponding motors on the basis of the clock pulses input into the motor drivers through respective clock input terminals thereof,
wherein the improvement comprises that the clock input terminals of the motor drivers are connected to the clock output terminal of the processor in common with each other.
The motors may be, for instance, those for adjusting the position on the printing paper in which the image is to be formed.
In accordance with the present invention, since a plurality of motor drivers use one channel of an integrated timer controller of the processor in common with each other, more motors than the number of the available channels of the integrated timer controller can be control

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