Motion vector detecting circuit

Details Motion vector detecting circuit Motion vector detecting circuit

1997-05-20

2001-11-20

Kelley, Chris (Department: 2613)

Pulse or digital communications

Bandwidth reduction or expansion

Television or motion video signal

Reexamination Certificate

active

06320906

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a circuit for detecting a motion vector corresponding to the size and the direction of movement of an image.
Various types of animation encoding standards adopt motion-compensated predictive coding. In the motion compensated predictive coding, a motion vector in an image to be encoded is detected and motion compensation is effected on the basis of the detected motion vector before intra-frame prediction. The result of the intra-frame prediction (i.e., a difference between a succeeding frame and a preceding frame) is subjected to discrete cosine transform (DCT). The detection of the motion vector and the motion compensation is carried out with a block comprising 16×16 pixels (i.e., a macro block) used as a unit, and the DCT is carried out with a sub block comprising 8×8 pixels used as a unit.
Conventionally, a motion vector is detected in an input image and a reference image by a technique designated as block matching. In the block matching, a block to be processed (comprising 16×16 pixels) is first extracted from an input image, and a plurality of prospective reference blocks (each comprising 16×16 pixels) are extracted from a certain search range in a reference image. Then, with regard to each of the plural prospective reference blocks, an evaluation value indicating similarity with the block to be processed is calculated. This evaluation value is calculated as a sum of squares of differences in the pixel values between these blocks or as a sum of absolute values of the differences in the pixel values between these blocks. One prospective reference block, among the plural prospective reference blocks, having the minimum evaluation value, namely, one which is most similar to the block to be processed, is selected as a reference block. Ultimately, a motion vector corresponding to the positional relationship between the block to be processed and the reference block is determined.
However, when brightness variation such as a flicker and fade-in/fade-out is caused in the input image, namely, when a DC component is varied in the input image, a precise motion vector cannot be detected. Therefore, Japanese Laid-Open Patent Publication No. 5-292489 discloses a method of estimating a motion vector as a countermeasure against this problem. In this method, an average value of all the pixels in an input image is subtracted from each of the pixel values in a block to be processed (comprising 16×16 pixels), and an average value of all the pixels in a reference image is subtracted from each of the pixel values in a prospective reference block (comprising 16×16 pixels), and thereafter, an evaluation value for the block matching is calculated. Alternatively, Japanese Laid-Open Patent Publication No. 6-178284 discloses a motion vector detecting circuit. In this circuit, an average value of pixels in a block to be processed (comprising 16×16 pixels) is subtracted from each of the pixel values in the block to be processed, and an average value of pixels in a prospective reference block (comprising 16×16 pixels) is subtracted from each of the pixel values in the prospective reference block, and thereafter, an evaluation value for the block matching is calculated.
In the aforementioned conventional techniques, however, an AC component included in a DCT result obtained from an image difference cannot be minimized. Therefore, encoding efficiency cannot be improved.
SUMMARY OF THE INVENTION
The object of the invention is realizing motion vector detection which can minimize an AC component included in a DCT result obtained from a frame difference.
In order to achieve this object, an average pixel value obtained in each processing unit of the DCT, namely, each sub block, is used in removal of a low frequency component including a DC component in this invention. Specifically, from each of pixel values in each sub block (comprising 8×8 pixels) in a block to be processed (comprising 16×16 pixels), an average value of the pixels in the sub block is subtracted, and from each of pixel values in each sub block (comprising 8×8 pixels) in a prospective reference block (comprising 16×16 pixels), an average value of the pixels in the sub block is subtracted. Thereafter, an evaluation value for block matching is calculated. At this point, each prospective reference block can be provided with one evaluation value, or each sub block can be provided with one evaluation value.


REFERENCES:
patent: 5200820 (1993-04-01), Gharavi
patent: 5235419 (1993-08-01), Krause
patent: 5502492 (1996-03-01), Jung
patent: 5526295 (1996-06-01), Astle
patent: 5557341 (1996-09-01), Weiss
patent: 5561475 (1996-10-01), Jung
patent: 5576767 (1996-11-01), Lee
patent: 5608652 (1997-03-01), Astle
patent: 5638310 (1997-06-01), Artieri
patent: 5691774 (1997-11-01), Yasuda
patent: 5790207 (1998-08-01), Jung
patent: 5-292489 (1993-11-01), None
patent: 5-328333 (1993-12-01), None
patent: 6-178284 (1994-06-01), None

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