Motion picture encoder

Television – Bandwidth reduction system – Data rate reduction

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348419, H04N 712

Patent

active

059780339

ABSTRACT:
A motion picture encoder employs a motion compensation predictive encoding method to provide video signals. The motion picture encoder uses a relatively small storage capacity for a frame memory. Specifically, the frame memory has a storage capacity for storing at least two original pictures and one local decoding picture. A noise reducer unit performs a noise reducing process with respect to a present picture signal and a preceding picture signal. For example, a difference value is calculated between the present picture signal and preceding picture signal and is multiplied by a prescribed coefficient, whereupon a result of the multiplication is added to the preceding picture signal. In addition, a motion estimation/compensation unit is provided to perform motion estimation and motion compensation with respect to an encoding picture and a reference picture. A memory control unit is provided to control a data transfer between the noise reducer unit, frame memory and motion estimation/compensation unit. Specifically, the memory control unit controls the frame memory to allow an input of the present picture from the noise reducer unit, an output of the preceding picture to the noise reducer unit, outputs of the encoding picture and reference picture to the motion estimation/compensation unit and an input of the local decoding picture from the motion estimation/compensation unit. An interface between the frame memory and memory control unit has the capacity for a data transfer rate which is five or more times faster than an input rate of video signals.

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Fukinuki, T., Multi-Dimensional Signal Processing of TV Pictures, pp. 188-191, Daily Industrial Paper Company of Japan, 1988.
T. Okubo, et al., "Development of a Two Chip Real-Time MPEG2 SP@ML Video Encoder", 1996 general meeting of the Institute of Electronics, Information and Communication Engineers of Japan, C562, p. 178.
S. Kumaki, et al., "A Chip Set for A Programmable Real-Time MPEG2 Video Encoder--A Chip Set Architecture and Controller LSI", The Institute of Electronics, Information and Communication Engineers, ICD95-102, Aug. 1995, pp. 1-8.

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