Motion estimation processor architecture for full search block m

Details Motion estimation processor architecture for full search block m Motion estimation processor architecture for full search block m

1995-03-17

1997-12-09

Boudreau, Leo

Image analysis

Applications

Motion or velocity measuring

382236, 348699, G06K 900, G06K 936, H04N 514

Patent

active

056968361

ABSTRACT:
A circuit for calculating a sum of absolute errors for use in full block search matching in a motion estimation processor is disclosed herein, the circuit being easily implemented and capable of running at 54 Mhz. The circuit accesses search window and reference data from memory and loads the data into rows of laterally interacting processing elements having an architecture capable of fast data processing. A sum of absolute errors between all elements of each row of search data and all elements of each row of reference data is calculated, and the absolute error for all rows of processing elements is totalled. From this total sum of absolute error, the motion vector may be predicted for the next frame.

REFERENCES:
patent: 5351095 (1994-09-01), Kerdranvat
patent: 5469226 (1995-11-01), David et al.
patent: 5568203 (1996-10-01), Lee
Kun-Min Yang, Ming-Ting Sun and Lancelot Wu, A Family of VLSI Designs for the Motion Compensation Block-Matching Algorithm, IEEE Transactions on Circuits and Systems, vol. 36, No. 10, Oct. 1989, pp. 1317-1325.
Yeu-Shen Jehng, Liang-Gee Chen and Tzi-Dar Chiueh, An Efficient and Simple VLSI Tree Architecture for Motion Estimation Algorithms; IEEE Transactions on Signal Processing, vol. 41, No. 2, Feb. 1993, pp. 889-899.
Thomas Komarek and Peter Pirsch, Array Architectures for Block Matching Algorithms, IEEE Transactions on Circuits and Systems, vol. 36, No. 10, Oct. 1989, pp. 1301-1308.
Baek et al, "A Fast Array Architecture for Block Matching Algorithm", Circuits and Systems, 1994 IEEE International Symposium, vol. 4, 1994.
Chan et al., "Motion Estimation Architecture for Video Compression", IEEE Transactions on Consumer Electronics, vol. 39, No. 3, Aug. 1993.
Hsieh et al, "VLSI Architecture for Block-Matching Motion Estimation Algorithm", IEEE Transactions on Circuits and Systems for Video technology, vol. 2, No. 2, Jun. 1992.
Nam et al, "A VLSI Design for Full Search Block Matching Motion Estimation", ASIC Conference and Exhibit, 1994.
Nam et al, "Flexible VLSI Architecture of Full Search Motion Estimator for Video Applications", IEEE Transactions on Consumer Electronics, vol. 40, No. 2, May 1994.

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