Motion compensation device

Image analysis – Image compression or coding – Predictive coding

Reexamination Certificate

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Details

C382S232000, C382S236000

Reexamination Certificate

active

06618508

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to video decoding. More particularly, the present invention relates to a method and apparatus for applying motion compensation to video decoding.
2. Discussion of Related Art
The Motion Picture Experts Group (MPEG) has promulgated two encoding standards for full-motion digital video and audio, popularly referred to as “MPEG-1” and “MPEG-2”, which provide efficient data compression. To simplify the description, where the description is applicable to the MPEG-1 and MPEG-2 standards, the term “MPEG” will be used. MPEG encoding techniques can be used in digital video such as high definition television (HDTV). A publication describing MPEG-1 and MPEG-2 encoding and decoding techniques, Mitchell, J., Pennebaker, W., Fogg, C., and LeGall, D.,
MPEG Video Compression Standard
, Chapman and Hall, New York, N.Y. (1996), is incorporated herein by reference.
In MPEG, a predicted image can be represented with respect to no other, one, or more reference image(s). Hereafter when the term “image” is used what is meant is a macroblock representation of the image defined in MPEG. Predicted images may be intracoded or interceded. Intracoded images are defined with respect no other reference images. Intercoded predicted images in so called “average mode operation” are defined with respect to a reference image that is to be displayed earlier in time (forward reference image) and a reference image that is to be displayed later in time (backward reference image). In average mode operation, a predicted image has two associated motion vectors in the x and y direction that indicate the locations of forward and backwards reference images relative to the reference image. Each of the two motion vectors indicates a pixel offset to the forward and backwards reference images within a frame.
MPEG-2 defines an average mode operation called “dual prime”. In dual prime average mode, a predicted image has two associated motion vectors in the x and y direction that indicate the locations of forward and backwards reference images relative to the reference image. Forward and backwards reference images are either even or odd fields. Herein the term “average mode” includes “dual prime”.
FIG. 1
depicts reference frame
100
that includes predicted image
102
with motion compensation vectors
104
and
106
that point to locations of respective forward reference image
108
and backwards reference image
110
. Forward reference image
108
is located among a forward frame
103
, displayed earlier in time than reference frame
102
. Backwards reference image
110
is located among a backwards frame
105
, displayed later in time than reference frame
100
.
In non-average mode operation, a predicted image is derived from either a forward image or backwards image, and thus have only one set of associated motion vectors in the x and y direction.
It is desirable that MPEG decoders increase the speed or efficiency at which they decode and decrease in cost. As the density of pixels within a video image increases, there is need for faster decoding of MPEG encoded video images. Insufficiently fast decoding leads for example to frame loss within a video that is noticeable to the human eye. Reducing the number of hardware elements in an MPEG decoder can reduce its cost.
What is needed is a method and apparatus to generate predicted images at a sufficiently fast rate with smooth display while reducing a number of hardware elements used.
SUMMARY
One embodiment of the present invention includes a computer system that performs motion compensation, the computer system including; a storage device, a memory unit that loads at least one error correction value and at least one reference component into the storage device; and a calculation unit coupled to receive the at least one reference component and the at least one error correction value from the storage device. In this embodiment, the calculation unit determines multiple predicted components in parallel and the calculation unit stores the multiple predicted components into the storage device.
One embodiment of the present invention includes a method of loading data in a first arrangement and storing the data in a second arrangement, where the first and second arrangements are different, including the acts of: loading the data, where the data is in a first arrangement; determining an arrangement to store the data; and selectively storing the data in the second arrangement.
One embodiment of the present invention includes a computer system that loads data in a first arrangement and stores the data in a second arrangement, the computer system includes: a storage device; a memory unit which loads the data from the storage device, the data being in a first arrangement; a second storage device; and a circuit, which according to an interleave code, selectively stores the data in the second storage device in a second arrangement, where the first and second arrangements are different.


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