MOSFET single-pair differential amplifier having an adaptive...

Amplifiers – With semiconductor amplifying device – Including differential amplifier

Reexamination Certificate

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Details

C330S258000

Reexamination Certificate

active

06281753

ABSTRACT:

FIELD OF THE INVENTION
This invention relates generally to the field of operation amplifiers; and, in particular, to an adaptive biasing scheme for a differential single-pair MOSFET amplifier input stage using backgate biasing techniques to provide a wide common mode range which includes both the positive and negative power supply voltage rails.
BACKGROUND OF THE INVENTION
Although digital implementations have replaced most analog circuitry, an analog world necessitates the use of operational amplifiers within an integrated circuit to build the interface between external systems and internal electronic circuitry within a variety of electronic devices from medical instruments, portable phones, notebook computers, cassette tape recorders and battery operated electronic devices, to name a few. Operational amplifiers are used primarily with externally applied feedback in pulse shaping, filtering, signal processing and instrumentation applications. In an effort to prolong life and to reduce size and weight of these electronic devices, the industry trend demands a smaller, lower voltage and power consumption operational amplifier. Operational amplifiers can be characterized by their low cost, ease of use and wide availability and, thus, are in high demand.
The ideal operational amplifier is a voltage controlled voltage source having a differential input and a single-ended output. Ideal operational amplifier characteristics include infinite gain, zero input offset voltage, infinite input impedance, zero output resistance, high bandwidth, high speed, no frequency dependence, no temperature dependence, no distortion, no processing dependence, sufficient output drive capabilities, and low power consumption. Manufacturing processes, however, generate less than ideal operational amplifier characteristics. Thus, it is the job of the circuit designer to optimize one or more characteristics of the actual operational amplifier in an effort to compensate for non-ideal conditions.
Conventional operational amplifier designs include at least two stages: an input stage and an output stage. The input stage, having a non-inverting input and an inverting input, derives the difference between the two inputs. The differential amplifier is one of the most widely used classes of gain stages in analog IC design. As
FIG. 1
illustrates, the input stage
10
includes a pair of transistors
12
and
14
configured as differential amplifier having two symmetrical circuit branches, wherein each branch includes a transistor
12
and
14
coupled to one of the input terminals
26
and
28
. Additionally, as active loads each branch includes a second transistor
16
and
18
having directly coupled gates. Each source of transistors
16
and
18
are tied to an upper power supply rail
20
. Each branch beneath differential transistor pair
12
and
14
is coupled to the source of current-source transistor
30
. Current source transistor
30
is biased by a voltage V
bias
. Within each branch, the transistor produces a signal proportional to the voltage on the corresponding input terminal
26
and
28
. The output
22
and
24
of the input stage
10
is the difference between the signal in each branch
26
and
28
of the differential amplifier. Ideally, the values of corresponding circuit components in the two branches are identical, so that when identical voltages are applied to each input
26
and
28
, i.e. a common-mode input voltage, the signals in each branch are also identical and the output of the input stage
10
is zero.
Conventionally, the common-mode input voltage range of a differential gain stage is the maximum range of dc voltage that can be applied, simultaneously, to both inputs without causing the cutoff or saturation of the pair of differential amplifier transistors or the cutoff, saturation, or breakdown of any of the gain stages inside the operational amplifier. A common-mode input voltage which is at or near one of the supply voltages may drive the transistors in the input stage into either a saturation or cutoff condition. This limits the useful range of common-mode input voltages since they must not approach or exceed either of the operational amplifier's supply voltages. A conventional rule of thumb is that the input signal should not come within about 1 volt of either the high or low power supply rails.
In
FIG. 1
, the lower limit of the input common-mode range is set by the saturation of the current-source transistor
30
having a threshold voltage V
T
or the cutoff of gain transistors,
12
and
14
. The lower limit occurs when both inputs are lowered, approaching a voltage within the threshold voltage V
T
of the lower power supply rail
34
of voltage−V
LL
. The upper limit of the common-mode range is set by the saturation of gain transistors,
12
and
14
, as both inputs are raised toward the upper power supply rail
20
of voltage +V
HH
. Thus, there is normally a high or low-end of the power-supply range, depending upon the polarity of the differential pair transistors
12
and
14
, where the differential pair of transistors
12
and
14
are not operable.
Consequently, operational amplifiers of conventional design are limited in range of operable common-mode input voltages. A wide common-mode range, however, is desirable, allowing easy amplifier interface with devices generating input signals at various dc levels. Presently, in single-supply or ground-sensing operational amplifier stages, the range can extend down to the negative power supply rail, −V
LL
. Yet, there exists no single pair differential amplifier approach that extends the common-mode range to include both the negative and positive power supply rails, +V
HH
and −V
LL
, because the threshold voltage of the differential amplifier pair must be reached prior to each transistor becoming conductive.
For this reason, a favored design approach of an input stage within an operational amplifier includes a complementary dual pair of differential amplifiers to compensate for the high or low-end of the power-supply range where one differential pair is operable and the other is not. This complementary dual pair of differential amplifiers has the capability to extend the common-mode range to include both the negative and positive power supply rails, +V
HH
and −V
LL
. Thus, the amplifier is enabled to have rail-to-rail input capability. More particularly, the amplifier output signal represents the differential input voltage as its common-mode portion travels the full extent of the power-supply range.
An example of such a design is found in U.S. Pat. No. 5,371,474 which describes several embodiments of a differential amplifier having first and second differential portions operating in parallel to provide representative signal amplification across the full power-supply range. As illustrated in
FIG. 2
, this input stage
40
having a dual differential amplifier pair
50
and
52
offers a solution to the problems faced with the aforementioned single differential amplifier pair input stage. This proposed approach extends the common-mode range to include both the negative and positive power supply rails. The complementary pair of differential amplifiers
50
and
52
are coupled in parallel such that at least one pair is in operation when the common-mode input voltage is at any voltage within the power-supply range.
The first differential amplifier
50
includes a pair of transistors
42
and
44
configured as a differential amplifier having two symmetrical circuit branches, wherein each branch includes a transistor coupled to one of the input terminals
54
and
56
. The second differential amplifier
52
includes a pair of transistors
46
and
48
configured as a differential amplifier having two symmetrical circuit branches, wherein each branch includes a transistor coupled to one of the input terminals
54
and
56
. One of the differential amplifier pairs
50
is active for input signals
54
and
56
at or near upper power rail voltage +V
HH
, and the other differential a

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