Active solid-state devices (e.g. – transistors – solid-state diode – With specified dopant
Patent
1998-03-30
1999-10-19
Hardy, David B.
Active solid-state devices (e.g., transistors, solid-state diode
With specified dopant
257610, 257617, 438162, H01L 2912
Patent
active
059694076
ABSTRACT:
An amorphized implant is performed to retard diffusion of ions in the source and drain regions. By retarding the diffusion of ions in these regions, a shallower junction is advantageously created in the silicon regions of the wafer. A slight degradation in leakage current is obtained if the amorphized implant is performed on both the source and the drain sides of a transistor. However, since the source region is a low voltage region with a very shallow junction, MOSFETs in both n-channel and p-channel regions are formed with improved performance and reliability.
A method of fabricating an integrated circuit includes forming a gate electrode over a semiconductor substrate, forming a source mask extending over the drain region of the semiconductor substrate, and implanting an implant species into the source region of the semiconductor substrate to form an amorphous implant layer of the semiconductor substrate. The semiconductor substrate has a source region adjacent to a first side of the gate electrode and has a drain region adjacent to a second side of the gate electrode. The amorphous implant layer is self-aligned with the source mask and extends through the exposed region of the semiconductor substrate and the source region of the semiconductor substrate. The method further includes the step of implanting a source implant into the exposed region of the semiconductor substrate and the source region of the semiconductor substrate to form a source implant layer of the semiconductor substrate. The source implant layer extends a shallower depth into the semiconductor substrate than the amorphous implant layer.
REFERENCES:
patent: 5134447 (1992-07-01), Ng et al.
patent: 5245208 (1993-09-01), Eimori
patent: 5258319 (1993-11-01), Inuishi et al.
patent: 5278082 (1994-01-01), Kawamura
patent: 5286664 (1994-02-01), Horiuchi
patent: 5338960 (1994-08-01), Beasom
patent: 5360749 (1994-11-01), Anjum et al.
patent: 5366915 (1994-11-01), Kodama
patent: 5420055 (1995-05-01), Vu et al.
patent: 5432106 (1995-07-01), Hong
patent: 5547885 (1996-08-01), Ogoh
patent: 5561072 (1996-10-01), Saito
patent: 5578509 (1996-11-01), Fujita
patent: 5585286 (1996-12-01), Aronowitz et al.
patent: 5633177 (1997-05-01), Anjum
Silicon Processing for the VLSI Era--Vol. 1: Process Technology, by S. Wolf, published by Lattice Press, Sunset Beach, CA, 1986, pp. 182-327.
Silicon Processing for the VLSI Era--Vol. 2: Process Integration, by S. Wolf, published by Lattice Press, Sunset Beach, CA, 1990, pp. 124-131.
Fulford Jr. H. Jim
Gardner Mark I.
Wristers Derick J.
Advanced Micro Devices , Inc.
Hardy David B.
Koestner Ken J.
LandOfFree
MOSFET device with an amorphized source does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with MOSFET device with an amorphized source, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and MOSFET device with an amorphized source will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2059471