Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1975-09-02
1977-03-08
Miller, Jr., Stanley D.
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307218, 307232, 307247R, 307269, 307279, H03K 1908, H03K 117, H03K 513, H03K 326
Patent
active
040114651
ABSTRACT:
An asynchronous data input signal is detected and synchronized by a fast-acting circuit. The input is used to modulate a local clock and a detecting latch is then driven by the data-modulated clock. Most of the propagation delay found in conventional detector-synchronizers is eliminated since the SET input to the latch, which is essentially the clock signal, is generated without any gate delay and the CLEAR input is generated with only a single gate delay. Thus, the circuit is well suited for multiple clock systems in which detection and synchronization to one clock must be accomplished before the pulse of a second clock begins.
REFERENCES:
patent: 3223930 (1965-12-01), Haile
patent: 3226572 (1965-12-01), Kuroda
patent: 3272995 (1966-09-01), Alexander et al.
patent: 3408581 (1968-10-01), Wakamoto et al.
patent: 3488478 (1970-01-01), Gilbert
patent: 3935475 (1976-01-01), Margolies
"Low Power Gated FET Latch" by Kraft et al in IBM Tech. Discl. Bull., vol. 15, No. 7, Dec. 1972, p. 2280.
Miller, Jr. Stanley D.
Pfeffer M.
Serp W. K.
Teletype Corporation
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