Fishing – trapping – and vermin destroying
Patent
1989-08-21
1992-02-11
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 40, 437 44, 437 57, 437 60, H01L 21265
Patent
active
050875825
ABSTRACT:
A method of fabricating a MOSFET wherein sidewall spacers are provided adjacent the gate of the MOSFET, the method including the steps of providing an insulating layer which extends over the source, drain and gate of the MOSFET and which acts as an impurity diffusion barrier; and forming on the insulating layer sidewall spacers which are composed of an insulating material.
REFERENCES:
patent: 4642878 (1987-02-01), Maeda
patent: 4757026 (1988-07-01), Woo et al.
patent: 4764477 (1988-08-01), Chang et al.
patent: 4843023 (1989-06-01), Chiu et al.
Campbell Richard N.
Haase Robert P.
Thompson Michael K.
Hearn Brian E.
Inmos Limited
Manzo Edward D.
Picardat Kevin M.
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