MOSFET analog multiplier

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307201, 364841, G06G 716

Patent

active

052548899

ABSTRACT:
A MOSFET analog multiplier with a variable resistive MOSFET linear means for linearly varying output current I depending upon a symmetrical input voltage from voltage sources V2 and -V2 and an input voltage from an input voltage source V1 operatively associated with the symmetrical input voltage from the voltage source V2 and -V2, with the variable resistive MOSFET linear means having a node A to output the varied output current I therethrough is disclosed. An operational amplifying unit for amplifying the linearly varied output current I and which includes an operational amplifier U with an inverting input terminal connected to the node A of the MOSFET linear means, a non-inverting input terminal connected to ground, and an output terminal. The operational amplifying unit further includes a feedback element Z connected between the inverting input terminal and the output terminal of the operational amplifier U, where in use the output terminal outputs a voltage Vo.

REFERENCES:
patent: 5061866 (1991-10-01), El-Naggar et al.
New Four-Quadrant CMOS Analogue Multiplier, Electronics Letters 19th Nov. 1987, vol. 23, pp. 1268-1270.
A20-V Four-Quardant CMOS Analogue Multiplier, IEE Journal of Solid-State Circuit, vol. SC-20, No. 6, Dec. 1985, pp. 1158-1167.

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