MOS Voltage divider

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

Patent

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Details

307304, 323 22, H03K 301

Patent

active

042988110

ABSTRACT:
A simple MOS voltage divider uses three enhancement MOS transistors, which includes one load connected to two drivers in parallel. The gate of one driver is connected to the output node, and the other two gates are connected to the supply voltage. The transistors have a common substrate.
By proper choice of the transistor geometry only, the output node voltage can be made independent of the threshold and temperature variations for output voltages larger than one threshold and smaller than one-half the supply voltage. Moreover, the ratio between the output and supply voltages remains constant.

REFERENCES:
patent: 3806742 (1974-04-01), Powell
patent: 4008406 (1977-02-01), Kawagoe
patent: 4038563 (1977-07-01), Zuleeg
patent: 4069430 (1978-01-01), Masuda
patent: 4152716 (1979-05-01), Torii

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