MOS VLSI device having shallow junctions and method of making sa

Details MOS VLSI device having shallow junctions and method of making sa MOS VLSI device having shallow junctions and method of making sa

1985-10-30

1989-06-20

Wojciechowicz, Edward J.

357675, 357 20, 357 55, 357 54, 357 71, H01L 2978

Patent

active

048413470

ABSTRACT:
A semiconductor device and method of making is disclosed wherein the semiconductor device includes a MOSFET with very shallow source and drain regions. The high sheet resistivity normally associated with such shallow regions is obviated by growing an epitaxial layer directly from the surface of the shallow source and drain regions, highly doping the layer, then forming a layer of refractory metal silicide on the epitaxial layer. The resulting structure yields a MOSFET having very shallow source and drain regions with very low sheet resistance.

REFERENCES:
patent: 4384301 (1983-05-01), Tasch et al.
patent: 4458410 (1984-07-01), Sugaki et al.
patent: 4476475 (1984-10-01), Naem et al.

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